Nor Flash Forum Discussions
该产品的背面印记是马来西亚,但我们发现赛普拉斯半导体的S29AL016J70TFI010|闪光灯|Arrow.com 显示了泰国的起源,请问马来西亚现在是否也生产这种模式?
Show LessHello,
I'm erasing flash (using S29GL064N NOR Flash, --> ref.: Table 17. Command Definitions (x16 Mode, BYTE# = VIH)).) continuously for testing purpose, but randomly (after hours or immediately or never comes) issuing suspend status after erase command (expected BUSY status).
In the below code, I'm reaching inside the IF condition where I have added breakpoint (showing SUSPEND status).
Please guide me what might be the reason which causing SUSPEND immediately after erase command.
1. Tried this with disabling interrupt and didn't saw this issue, but I need confirmation does interrupt is the cause for SUSPEND issue ?
2. Also confirm the command used in while loop (like suspend and resume) are causing this issue ?
FLASH_Command(PATTERN_555, (uint16_t) eCMD_UNLOCK_PART1);
FLASH_Command(PATTERN_2AA, (uint16_t) eCMD_UNLOCK_PART2);
FLASH_Command(PATTERN_555, (uint16_t) eCMD_ERASE_SETUP);
FLASH_Command(PATTERN_555, (uint16_t) eCMD_UNLOCK_PART1);
FLASH_Command(PATTERN_2AA, (uint16_t) CMD_UNLOCK_PART2);
*((uint16_t*)((uint32_t )pFLASH + addr)) = (uint16_t)CMD_ERASE_CONFIRM;
//Added 50us of delay, allow to complete timeout for erase command.
ret = lld_StatusGet(addr);
if (ret == DEV_SUSPEND)
{
//Breakpoint for test
//Code reach here, which is not expected. Expect only BUSY status.
}
ret = lld_StatusGet(addr) //Reading flash DQX status bit
While(ret == DEV_BUSY)
{
Flash_suspend_command()
//Processing internal commands
Flash_resume_command()
ret = lld_StatusGet()
}
Thanks,
Nitin
Show LessHi Everyone,
We are using parallel NOR flash(S29JL032J) in our custom board. I have gone through the datasheet of this chip. Need to develop driver for this chip. Any example programs on this will be greatly helpful. Tried searching the web, but no luck.
Any references?
ThankYou!!
Show LessHi,
How to inject error in s25hs01gt device.
i tried by inject 1 bit error at memory_features_i0.write_mem_w(addr,data) after written data and tried reading the same address. There is no ecc status bit asserted for this. Checked ecsv register.
Kindly give me the procedure for checking ecc feature
Show LessHi,
Due to supply difficulties with GL-S 256Mb products, we are considering substituting GL-S 1Gb products.
Please tell us about the treatment on the board of pins A24 and A25 of the address signal, which were not used in the 256Mb product.
We do not need 1Gb because we will use 256Mb capacity.
Is it OK to connect directly to ground externally?
Is external pull-down necessary? If so, what is the recommended resistance value?
Best Regards,
Kumada
Show LessHello,
I have two codes:
- From sample reference code
- Edited code as per datasheet
- As per algorithm, need to read twice again after DQ5 status and need to issue reset command if timeout occur.
- Or do I need to handle Timeout condition outside of function with issuing reset command and check it again until its NOT_BUSY ?
I want to confirm the edited code (2nd) is correct or not. And if it is not correct then why?
For reference please check the algorithm below,
1. Below, sample reference code.
/******************************************************************************
*
* lld_StatusGet - Determines Flash operation status
*
*
* RETURNS: DEVSTATUS
*
*/
DEVSTATUS lld_StatusGet
(
FLASHDATA * base_addr, /* device base address in system */
ADDRESS offset /* address offset from base address */
)
{
FLASHDATA dq2_toggles;
FLASHDATA dq6_toggles;
FLASHDATA status_read_1;
FLASHDATA status_read_2;
FLASHDATA status_read_3;
status_read_1 = FLASH_RD(base_addr, offset);
status_read_2 = FLASH_RD(base_addr, offset);
status_read_3 = FLASH_RD(base_addr, offset);
/* Any DQ6 toggles */
dq6_toggles = ((status_read_1 ^ status_read_2) & /* Toggles between read1 and read2 */
(status_read_2 ^ status_read_3) & /* Toggles between read2 and read3 */
DQ6_MASK ); /* Check for DQ6 only */
/* Any DQ2 toggles */
dq2_toggles = ((status_read_1 ^ status_read_2) & /* Toggles between read1 and read2 */
(status_read_2 ^ status_read_3) & /* Toggles between read2 and read3 */
DQ2_MASK ); /* Check for DQ6 only */
if (dq6_toggles)
{
/* Checking WriteBuffer Abort condition:
Check for all devices that have DQ6 toggling also have Write Buffer Abort DQ1 set */
if ((!dq2_toggles) &&
((DQ6_TGL_DQ1_MASK & status_read_1) == DQ6_TGL_DQ1_MASK)
)
return DEV_WRITE_BUFFER_ABORT;
/* Checking Timeout condition:
Check for all devices that have DQ6 toggling also have Time Out DQ5 set. */
if ((DQ6_TGL_DQ5_MASK & status_read_1) == DQ6_TGL_DQ5_MASK )
return DEV_EXCEEDED_TIME_LIMITS;
/* No timeout, no WB error */
return DEV_BUSY;
}
else /* no DQ6 toggles on all devices */
{
/* Checking Erase Suspend condition */
status_read_1 = FLASH_RD(base_addr, offset);
status_read_2 = FLASH_RD(base_addr, offset);
/* Checking Erase Suspend condition */
if ((((status_read_1 ^ status_read_2) & DQ2_MASK) == 0)
)
return DEV_NOT_BUSY; /* All devices DQ2 not toggling */
else // at least one device is suspended
{
return DEV_SUSPEND; /* At least some devices toggle DQ2 */
}
}
}
2. Below, edited Sample reference code as per datasheet
DEVSTATUS lld_StatusGet
(
FLASHDATA * base_addr, /* device base address in system */
ADDRESS offset /* address offset from base address */
)
{
FLASHDATA dq2_toggles;
FLASHDATA dq6_toggles;
FLASHDATA status_read_1;
FLASHDATA status_read_2;
status_read_1 = FLASH_RD(base_addr, offset);
status_read_2 = FLASH_RD(base_addr, offset);
/* Any DQ6 toggles */
dq6_toggles = ((status_read_1 ^ status_read_2) & /* Toggles between read1 and read2 */
DQ6_MASK ); /* Check for DQ6 only */
/* Any DQ2 toggles */
dq2_toggles = ((status_read_1 ^ status_read_2) & /* Toggles between read1 and read2 */
DQ2_MASK ); /* Check for DQ6 only */
if (dq6_toggles)
{
/* Checking WriteBuffer Abort condition:
Check for all devices that have DQ6 toggling also have Write Buffer Abort DQ1 set */
if ((!dq2_toggles) &&
((DQ6_TGL_DQ1_MASK & status_read_1) == DQ6_TGL_DQ1_MASK)
)
return DEV_WRITE_BUFFER_ABORT;
/* Checking Timeout condition:
Check for all devices that have DQ6 toggling also have Time Out DQ5 set. */
if ((DQ6_TGL_DQ5_MASK & status_read_1) == DQ6_TGL_DQ5_MASK )
{
status_read_1 = FLASH_RD(base_addr, offset);
status_read_2 = FLASH_RD(base_addr, offset);
dq6_toggles = ((status_read_1 ^ status_read_2) & /* Toggles between read1 and read2 */
DQ6_MASK );
if (dq6_toggles)
{
//Issue reset command here as per algorithm in the datasheet
return DEV_BUSY; // To continue checking of status until dq6 not toggle (or DEV_NOT_BUSY).
}
else
{
return DEV_BUSY;// Here also need to return BUSY because, need to check DQ2 pin for SUSPEND or DEV_NOT_BUSY status in next iteration of loop.
}
}
/* No timeout, no WB error */
return DEV_BUSY;
}
else /* no DQ6 toggles on all devices */
{
/* Checking Erase Suspend condition */
status_read_1 = FLASH_RD(base_addr, offset);
status_read_2 = FLASH_RD(base_addr, offset);
/* Checking Erase Suspend condition */
if ((((status_read_1 ^ status_read_2) & DQ2_MASK) == 0)
)
return DEV_NOT_BUSY; /* All devices DQ2 not toggling */
else // at least one device is suspended
{
return DEV_SUSPEND; /* At least some devices toggle DQ2 */
}
}
}
Show Less
インフィニオン製NOR FLASH S29GL128Sについて質問させていただきます。
Device ID and Common Flash Interface (ID-CFI) ASO Map
にPage Mode Typeというレジスタがあり、Dataが0003hとなっていますが、
これは”本メモリのPage Mode Typeは、16Word Pageである”という意味で、
Read Onlyのレジスタという認識ですが、合ってますでしょうか?
Show Less
SPI NOR Fit rate S25FL064LABNFI04xを御教示頂きたくお願い致します。
(MTBF算出の為)
Please confirm the handling of the BYTE# pin of the S29GL512T11DHIV10.
Currently, it is only used in x16 mode, but the BYTE# pin is recognized as x16 by default due to internal pullup.
Therefore, external processing of BYTE# pins is not necessary, but is it correct?