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We will check how to connect IO3_RESET # of S25Fl064L when not in use.
It is used in SIO mode and has no RESET signal.
At that time, when I connected + 3.3V to IO3_RESET# and executed RDD 9Fh, the expected data could not be read and all Low was output.
When IO3_RESET# was set to NC, the expected data was output when RDID 9Fh was executed.
What could be the reason why it doesn't work with + 3.3V connected to IO3_RESET#?
Also, does it work without problems when a pull-up resistor is connected?
Best Regards,
Kumada
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Hello ,
Thank you for contacting Cypress Semiconductor,
There is no need to connect the RESET# input signal pin to +3.3V. The RESET# input signal pin already has an internal pull-up and may be left unconnected in the system. The internal pull-up will hold Reset Logic HIGH after the host system has actively driven the signal HIGH and then stops driving the signal.
Hope this helps...
Best regards,
Albert
Cypress Semiconductor Corp
An Infineon Technologies Company
if QUAD mode and Hardware RESET are not in use.
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Hello ,
Thank you for contacting Cypress Semiconductor,
There is no need to connect the RESET# input signal pin to +3.3V. The RESET# input signal pin already has an internal pull-up and may be left unconnected in the system. The internal pull-up will hold Reset Logic HIGH after the host system has actively driven the signal HIGH and then stops driving the signal.
Hope this helps...
Best regards,
Albert
Cypress Semiconductor Corp
An Infineon Technologies Company
if QUAD mode and Hardware RESET are not in use.
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Hi, Albert-san
Thank you for your advice.
When I connected +3.3V to IO3_RESET#, I had a symptom that RDID could not be read.
Can you explain the clear reason for this?
Best Regards,
Kumada
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Hello Kumada,
Which mode (SPI, Dual , Quad) is the S25FL064L configured in? If in Quad mode and RESET is not used, there is no need to connect RESET# to 3.3V, as there is already an internal pull-up.
Best regards,
Albert
Cypress Semiconductor Corp.
An Infineon Technologies Company
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Hello Kumada-san,
If the S25FL064Lis configured in QUAD mode, and IO3 is connected to VCC, then the device ID may not be read properly. However, if the S25FL064L is configured in SPI mode, and RESET# is connected to VCC, the device ID should be read correctly. Please provide details as to which mode the S25FL064L configured in.
Best regards,
Albert
Cypress Semiconductor Corp.
An Infineon Technologies Company