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Non Volatile RAM (F-RAM & NVSRAM)

MaKi_350451
New Contributor II

Part# : FM24CL64B-GTR

Let us know setup time for below condition.

Until to be enable start condition that SDL is LOW on I2C from setting WP to LOW state.

(From low state of WP to first access (START condition).)

Thank you

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1 Solution
Anonymous
Not applicable

Hi,

There is no setup time requirement for WP pin functionality.

Setting the WP pin to a HIGH condition (VDD) before write operation will write-protect all addresses. The FM24CL64B will not acknowledge data bytes that are written to protected addresses. In addition, the address counter will not increment if writes are attempted to these addresses.

Setting WP to a LOW state (VSS) will disable the write protect.

Thanks,

Nada

View solution in original post

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1 Reply
Anonymous
Not applicable

Hi,

There is no setup time requirement for WP pin functionality.

Setting the WP pin to a HIGH condition (VDD) before write operation will write-protect all addresses. The FM24CL64B will not acknowledge data bytes that are written to protected addresses. In addition, the address counter will not increment if writes are attempted to these addresses.

Setting WP to a LOW state (VSS) will disable the write protect.

Thanks,

Nada

View solution in original post

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