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Non Volatile RAM (F-RAM & NVSRAM)

HiKu_1337496
New Contributor II

Hi,

The WE signal is pulled up.
"H" is input to the WE signal, and it should decrease as the voltage of Vcc decreases.
It suddenly falls to Low.

Isn't nvSRAM operating such as drawing current?

pastedImage_0.png

Best Regards,

Kumada

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6 Replies
SudheeshK
Moderator
Moderator

Hello,

Could you please clarify what is blue and red signals? Both are marked as "WRL".

Are you observing any data corruption issues after a power cycle?

Thanks and Regards,

Sudheesh

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HiKu_1337496
New Contributor II

Hi, Sudheesh –san

Thank you for your reply.

Blue is the controller (SoC) output.

Via the buffer, the red is just before nvSRAM.

VCC is different on the controller side and the nvSRAM side.

The nvSRAM is powered down first.

Consider that the drop in VCC on the controller side is almost the same as the fall in front of the WRL buffer(Blue).

Best Regards,

Kumada

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SudheeshK
Moderator
Moderator

Hello,

How is the buffer between SoC and nvSRAM powered? Does nvSRAM and the buffer have same VCC supply? Can you provide the schematic diagram for better understanding?

Thanks and Regards,

Sudheesh

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HiKu_1337496
New Contributor II

Hi,

Below is a schematic diagram.

pastedImage_0.png

Best Regards,

Kumada

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SudheeshK
Moderator
Moderator

Hello,

Have you connected a pull-up resistor on WE and CE signals? Are you observing this behavior only on WE signal?

Please provide the schematic diagram of your application. We can review it and let you know, if there are any issues.

Thanks and Regards,

Sudheesh

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HiKu_1337496
New Contributor II

Hi, Sudheesh-san

Sorry for my late reply.

WE and CE are pulled up with 10kΩ.

The waveform of the CE signal is attached.

01.jpg

Yellow is an unrelated signal.

Green is the CE signal after buffering.

Blue is the CE signal before the buffer.

I'm sorry, but I cannot provide the schematic diagram of the application because it is confidential.

Best Regards,

Kumada

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