MOSFET (Si/SiC) Forum Discussions

Dear Support Team,
As part of my diploma thesis at the Center for Microtechnical Production at the TU Dresden, I am working on the development of a test device that examines the thermal conductivity of the substrate connection of bare dies and thus allows conclusions to be drawn about the quality of the connection point. In order to design the test head, I need the surface dimensions of various bare dies used in power electronics. Could you please send me some sample datasheets of such bare dies? It would help me a lot!
Thank you very much!

Kind regards
Lea Borngräber

Dear Community,

Pre Story:

I am currently working on a booster coverter. As low side FET for the booster I was looking to use some Infineon Mosfets.

Picture just as reference.

I analyzed the following MOSFETS.

1. IAUC40N08S5L140
2. IAUC50N08S5L096

Because the design is quiet power loss critical, I was especially interested in the rising edge (Mosfet turn-off time) and falling edge (Mosfet turn-on time) of the Switching node (VDS). I measured the rise and fall edge of the Vds signal (from 10%-90%) of booth Mosfets and some questions came up, which I was not able to answer.

Measurement:

1) 

IAUC50N08S5L096

As you can see, the measured Vds of this low side Fet is for the

 rising edge (Mosfet turn off)  ~24ns

falling edge (Mosfet turn on time) ~10ns

2) IAUC40N08S5L140 

As you can see, the measured Vds of this low side Fet is for the

 rising edge of Vds (Mosfet turn off)  ~17ns

falling edge (Mosfet turn on time) ~9ns

In booth cases the booster current in the coil was 5A rms. As you can see in the measurement below, for one of the FET.

More information: Booth gates were controlled with a 7,5V gatevoltage and the gate resistor on booth measurments was the same. (16,6R)

Question:

• Why is the rising edge of Vds (Mosfet turn off time) much longer than the falling edge (turn on time). Especially why is the rising egde of the IAUC50N08S5L096 much longer than the  IAUC40N08S5L140 rising edge. (24ns compared to 17ns)

I am switching the Gate with 7,5V. So, I understand that the falling edge is a bit faster because the Miller plateau is < 3,75V I also tested with a gate voltage of 6V however it didn’t make the rising and falling edge equal. I am looking forward to get an answer and will do all measurements and analytics, to provide more information, if it helps.

BR Mosfetslayer.