Is it possible to run the chip off a TCXO with a clipped sine wave output of 1.6-V peak-to-peak minimum (signal is AC coupled).
Yes. Turn OFF all load capacitors in the device to reduce the capacitance load on the XIN Pin to 12 pF. In such a scenario, a clipped sine wave of +/- 0.8 volt peak-to-peak on the input side or XIN side of an AC coupling capacitor connected back to the output of the TCXO can be used. The easiest recommendation is to simply purchase a low-cost 3 mm x 5 mm TCXO and drive this into the Cypress part as the clock reference.
Even though currently there is no specific TCXO recommendation, from an application point of view, Cypress clock generators and programming software are set up to handle a driven external reference.
For the external reference, as long as the input reference signal goes through [(VDD/2) +/- 1V)], it should be fine. The oscillator circuit is biased at VDD/2 and triggers on the rising edge of the input signal at the VDD/2 level. Therefore, only going through VDD/2 should be sufficient; Cypress recommends +/-1V to provide a margin for operation across all conditions.