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AURIX™ MCU: Memory Built-In-Self-Test (MBIST)

AURIX™ MCU: Memory Built-In-Self-Test (MBIST)

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What is MBIST?

 

The MBIST is a hardware mechanism that implements the verification of the integrity of the internal SRAM instances. The memory test unit (MTU) controls the MBIST.

How does the MBIST work?

 

Each SRAM in the AURIX™ MCU platform surrounds a digital hardware block that controls, among the others, the MBIST of internal memories. In AURIX™ MCU second generation, this hardware block is called SRAM Support Hardware (SSH). The MTU provides a unified register interface to control the operation and the functionality of each internal instance of this hardware block. MTU controls the various configurable test types for each of the SRAM blocks in the system. Additionally, MTU is used to initialize the hardware in each SRAM block in the system.

Why should users execute the MBIST?

 

The automotive industry sets high standards in terms of the safety and reliability of electronic components. For example, the faults on memory cells of an SRAM are considered as latent faults in ISO 26262. To meet these high standards, it is a state-of-the-art practice to verify the integrity of the memory cells and access logic.

When to execute the MBIST?

 

The ISO 26262 prescribes that the latent faults must be covered at least once per driving cycle. Even if the user is free to choose during the MBIST execution (start up, runtime, shut down), it recommends to run it during the startup, before the application software starts using SRAMs. Consider the following preconditions:

  • Before starting the test: Initialize the SRAM with correct ECC data.
  • During the test: The SRAM cannot be accessed. 

For more details, see the “Memory Test Unit (MTU)” section in the User’s manual.

Note: This KBA applies to the following series of AURIX™ MCUs:

  • AURIX™ TC2xx series
  • AURIX™ TC3xx series

What to do at the end of the MBIST?

 

After the MBIST completion, a bit is set in the corresponding Memory Test Done Status Register. If one or more errors are set in the corresponding Memory ECC Detection Register, the user must complete analysis by checking other MTU registers as instructed in the User’s manual. The appropriate reaction to a test fail depends up on a few factors, such as the type of the application, type of the SRAM, severity of the error, and so on. That is always a customer’s choice.

 

Community Translation: AURIX™ MCU: メモリ ビルト-イン-セルフ-テスト (MBIST) – KBA235662 
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