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I am trying to use hyperRAM in TE0725 board ...so I want to configure hyperRAM with microblaze core in xilinx vivado 2015.4 (webpack version)......... using your hyperRAM verilog file I have created IP (.xci) form......but after that I am not getting how to configure full IP ..... till now I am working on DDR3 RAM in Arty board ,............so please can you help me out how to configure it , send and receiver data through it......alsoI want one more thing to mention that when I have created IP it shows 198% of IO's (input/output)....can you explain this also....