Gate Driver ICs Forum Discussions
I hope this message finds you well. I am reaching out regarding a couple of questions I have about the datasheet for the IR2109(4)(S).
Firstly, I am curious about the capacitor specifications mentioned in the datasheet. I noticed that polarized capacitors are recommended for certain applications. However, I am interested in exploring the possibility of using non-polarized capacitors instead. Could you kindly provide some insight into whether non-polarized capacitors can be safely substituted for the polarized ones mentioned in the datasheet?
Secondly, upon attempting to calculate the value of the bootstrap capacitor using the provided formula, I encountered an unexpected result. Specifically, when I substituted the given values into the formula, I found that the denominator resulted in a negative value: (Vcc - Vf - VLs - Vmin) = (12V - 1V - 2.35V - 9V) = -0.35V. This negative value raises some concerns and prompts me to seek guidance on how to proceed with determining the appropriate value for the bootstrap capacitor. Could you please provide clarification on whether a negative value in this context is valid, or if there might be an alternative method or consideration to account for in this calculation?
I understand the importance of adhering to recommended component specifications and calculations, but I am curious about any potential flexibility or alternative approaches in these matters. Any guidance or clarification you could offer on these issues would be greatly appreciated.
Thank you very much for your attention to these inquiries. I look forward to hearing from you soon.
Best regards,
Show LessI have the following circuit to drive a 3 phase BLDC motor, I'm generating a 20kHz PWM signal for the MOSFETs, however I'm not sure about the correct pulse width I should use to conmutate the MOSFETs, I'm expecting 15A when the motor is starting and approximately 10A when driving.
The MOSFETs I'm using are the IRFB7730 , VGSon would be 12V, VDS ranges from +54.6V (full charge) and +48V, can anyone help please? I just want to know the recommended maximum pulse-width, and minimum pulse-width.
Show LessWhat power output is the 2EDN7524F FET driver capable of?
I need to generate a 1MHz 20V p-p square wave into 50 Ohms.
This is a current of just 400mA during the on part of the square wave (which is significantly less than the 5Amp rating of the device) but I can't find any mention of acceptable duty cycle.
How much heat will be generated in the device when delivering a 1MHz 20V square wave into a 50 Ohm resistive load and will this be enough to burn out the device?
The on resistance is specified as 0.7 ohms or less.
At a continuous 400mA this would generate 112mW.
Will this overheat the device?
And how do you calculate the additional heat generated during switch transitions?
Hello,
I am trying to configure two 1edi2002as devices in a daisy chain configuration for three phases, so six devices in total.
I am able to configure the devices and move them between the different states as one would expect but when I try to move them to the active state by setting the EN pin to high and enter Weak Active mode (OPM6) or Active Mode (OPM4), the second device does not do the state transition and remains in the Verification mode (OPM5) or in the Configured mode (OPM3).
This is indicated by PSTAT2.ENVAL (EN valid status) which is only being set for one of the devices of a phase while the other one indicates that the EN signal was invalid (cleared).
I have measured the EN pin on all the devices and the signal is getting set to high on all devices which is also indicated by the PPIN.ENL bit which is set to 1 for all devices
The only thing I see a difference in is the value of INSTPL and INPL bits in the PPIN register where on one of the devices INSTPL is set and for the other driver INPL bit is set.
Any suggestions on what I might be missing in order to get the second daisy chained device to enter active mode and what might be causing the second device to not properly receive a valid signal on the EN pin as is indicated by the ENVAL bit in PSTAT2 register?
I am configuring the devices for EN mode (PCFG2.FEN cleared):
When the EN Mode is selected (bit PCFG2.FEN cleared), pin EN/FEN acts as an Enable pin. A valid EN/FEN
signal is defined as a digital High level. When EN/FEN is at Low level, the signal is considered as not valid and
the device is in Disabled State. In case of a High-to-Low transition, an Event Class A is generated
Regards,
Petter
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Hello,
I would like to use the IFX007T for driving a resistive load (~10Ohm).
I would like to drive it at 200Hz, how can I calculate the resistor at pin SR for rise-time and fall-time?
Thank you very much in advance.
Best Regards.
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I am currently using the IRS21084S as a gate driver for a half-bridge inverter, but I am having trouble, so I would like to know about a driver that meets the specifications below.
DatasheetIR2108(4) (S) & PbF (infineon.com)
Compatible products with the same pin assignment as IRS21084S.
〇 HO and LO drive output current (current supply capacity) is large (preferably 1A or more if possible)
〇Compatible with IRS21084S
・SOIC surface mount 14 pin, same pin layout
・it Has HIN input and inverted LIN input
I alreadly asked this community the same question and have gained the following two ICs,
解決済み: Re: Selection of gate driver - Infineon Developer Community
1. 2ED21084S06FJ
https://www.infineon.com/dgdl/Infineon-2ED2108-4-S06F-J-DataSheet-v02_32-EN.pdf?fileId=5546d4626cb27db2016cb8d752c029ef
2. 2ED2183S06F
2ED2183S06F/2ED21834S06J Datasheet-650 V high current half-bridge gate driver with integrated bootstrap diode (infineon.com)
But these proposed ICs have different pinouts(2), so we are looking for another alternative IC if possible. I would appreciate your feedback.
Hi,
The RFE pin is used to enable, fault reporting and programmable fault clear timer, it should only get triggered by either ITRIP OCP event or under voltage protection. Somehow, this pin is triggered by other events in our design, we have checked ITRIP, VCC, VBS are all fine, no voltage protection as well. This RFE triggering therefore causes our motor to stop at high speed (~400RPM for ceiling fan), which is undesirable.
Can we disable this RFE pin? How can we disable?
If we are not using the pins, how large is the recommended resistor value? 2M?
Currently, we are connecting to 1M, but it seems not enough to disable it.
We also observed over heating of this gate driver IC. After a few rounds of RFE triggering, we stopped the system, and once we turned it on again, motor was not running. Later on, we realized that at stop state the gate driver reached~130deg C already.
Could you advise why is this happening and how can we prevent overheating?
Thank you.
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Dear all
I am developing a smps full bridge input 48 Vdc, output 200+200Vdc 4800 W, 50 kHz.
I want to use the driver IR2110 and in the bridge there are two mosfets in parallel in each channel.
Can i use this drive to control these two components? If no, can you suggest me other options?
Sincerelly
Marcelo
Show LessIn the data sheet (Page 8), the target pins (HIN, LIN, ITRIP, EN) are listed in the Vin, clamp section.
In addition, the internal circuit diagram shows a clamp diode in the internal circuit of the HIN and LIN pins, which indicates that the pins are clamped at 5.2V. (Page13)
However, there is no clamp diode listed for the internal circuitry of the ITRIP and EN pins.
Which description is correct?
Do the ITRIP and EN pins have internal clamping diodes?
Data sheet
regards
AkUm
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