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User9635
AURIX
Hello Support,Shown below is a snippet from TRAPSTAT register Bit 2 .Can you please tell me what is the source for this TRAP2?What configuration does ... Show More
User22661
AURIX
I know that UCB_SWAP and UCB_OTP can do the proper work of SOTA  .I can also use SCU_STMEM1 to get the current SOTA status . But I don't know what SRU... Show More
User17900
AURIX
Hi, I am performing static code analysis for my project. We developed project in aurix development studio. In IFX_INTERRUPT(AdcIsr, 5, 2); is givi... Show More
User19977
AURIX
Hi there,the cpu load is a little bit high. I am thinking to run some tasks out of PSPR. What performance improvement should I expect comparing runnin... Show More
User17900
AURIX
Hi, I am working on establishing data communication between Tc233 (Aurix workspace, Infenion make, SLAVE) and CC26R1F (CCS workspace, TI make, MASTER)... Show More
User22805
AURIX
Alarm configuration:SMU_AG10CF2 = 1SMU_AG10CF1 = 1SMU_AG10CF0 = 0to forward a reset request to SCUTriggering Alarm:Once the error condition is true we... Show More
Jamber
AURIX
In TC377, what's the problem with DMA and CPU access a same SRAM at the same time? For example, during CPU reading a variable DMA moves a data to the ... Show More
User19903
AURIX
TLF35584 data sheet indicates "In case of over voltage at pin QTx, the corresponding tracker will be switched off, the event will be stored in an SPI ... Show More
RajeshVit
AURIX
How many full CAN messages doesTC333 controller support on 1 CAN node . We need to configure 130 CAN messages for the ECU . ECU communicates in the CA... Show More
User18904
AURIX
Hello,I would like to confirm if my understanding is correct about SAHMEM window usage for Aurix 2G HSM.1) Is it correct to write that HSM writes host... Show More