Difference Analysis Generated by HtmlDiff on 10/26/2004 1:34 PM  

Base file: C:\CY4632_RDK_1_21\Firmware\Source Code\RDK Keyboard\radio.h

Modified file: C:\CY4632_RDK_1_3\Firmware\Source Code\RDK Keyboard\radio.h

//--------------------------------------------------------------------------
//
// Include file which defines the LS Radio registers and C prototypes
//
//--------------------------------------------------------------------------
// $Archive: /WirelessUSB/WUSB Kits/CY4632 LS KBM RDK/DocSrc/CD_Root/Firmware/Source Code/RDK Keyboard/radio.h $
// $Modtime: 6/16/9/29/04 2:0819p $
// $Revision: 56 $
//--------------------------------------------------------------------------
//
// Copyright 2003-2004, Cypress Semiconductor Corporation.
//
// This software is owned by Cypress Semiconductor Corporation (Cypress)
// and is protected by and subject to worldwide patent protection (United
// States and foreign), United States copyright laws and international 
// treaty provisions. Cypress hereby grants to licensee a personal, 
// non-exclusive, non-transferable license to copy, use, modify, create 
// derivative works of, and compile the Cypress Source Code and derivative 
// works for the sole purpose of creating custom software in support of 
// licensee product to be used only in conjunction with a Cypress integrated 
// circuit as specified in the applicable agreement. Any reproduction, 
// modification, translation, compilation, or representation of this 
// software except as specified above is prohibited without the express 
// written permission of Cypress.
//
// Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND,EXPRESS OR IMPLIED, 
// WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
// Cypress reserves the right to make changes without further notice to the
// materials described herein. Cypress does not assume any liability arising
// out of the application or use of any product or circuit described herein.
// Cypress does not authorize its products for use as critical components in
// life-support systems where a malfunction or failure may reasonably be
// expected to result in significant injury to the user. The inclusion of
// Cypress’ product in a life-support systems application implies that the
// manufacturer assumes all risk of such use and in doing so indemnifies
// Cypress against all charges.
//
// Use may be limited by and subject to the applicable Cypress software
// license agreement.
//
//--------------------------------------------------------------------------

#ifndef _RADIO_H_
#define _RADIO_H_

#include "protocol.h"

#define AGC_OFF
#define DEFAULT_SEED   0   // Connect and data seed

#ifndef DEFAULT_XTL
#define DEFAULT_XTL 0x00
#endif


#define NUM_CHANNELS 78
#define MAX_PIN       7  // Network PIN is a 3 bit value

#ifndef CHANNEL_OFFSET
#define CHANNEL_OFFSET 2 // This is setup to ensure a guard ban at the low end
                         // Channel 0  - 2.402, a 2 MHz guard band to 2.400
                         // The upper guard band is protected by the use of
                         // NUM_CHANNELS in the protocol and application
                         // Channel 78 - 2.480, a 3.5MHz guard to 2.4835
#endif
#ifdef DATA_RATE_16
#define NUM_PNCODES  49
#endif

#ifndef DATA_RATE_16
#define NUM_PNCODES  8
#endif

#define EOF_BITS    3
#define SYNTH_SETTLE_COUNT    100

#ifdef DATA_RATE_16
#define RADIO_MODE  (b64_CHIP_BITS | bNORMAL_DATA_RATE)
#define THRESHOLD_L 8
#define THRESHOLD_H 56
#endif // DATA_RATE_16


#ifdef DATA_RATE_32
#define RADIO_MODE  (b32_CHIP_BITS | bNORMAL_DATA_RATE)
#define THRESHOLD_L 3
#define THRESHOLD_H 29
#endif // DATA_RATE_32

#ifdef DATA_RATE_64
#define RADIO_MODE  (b32_CHIP_BITS | bDOUBLE_DATA_RATE)
#define THRESHOLD_L 2
#define THRESHOLD_H 30
#endif // DATA_RATE_64

/***********************************
* CY Radio Register Definitions
***********************************/
#define REG_ID              0x00
#define mVERSION            0x0f
#define mMANUFACTURING      0xf0

#define REG_SYNTH_A_CNTR    0x01  
#define REG_SYNTH_N_CNTR    0x02

#define REG_CONTROL         0x03    
#define bRX_ENABLE          0x80    
#define bTX_ENABLE          0x40    
#define bPN_CODE_SELECT     0x20    
#define bAUTO_SYNTH_COUNT   0x10
#define bAUTO_PA_DISABLE    0x08
#define bPA_ENABLE          0x04
#define bAUTO_SYNTH_DISABLE 0x02
#define bSYNTH_ENABLE       0x01

#define REG_DATA_RATE       0x04    
#define bRADIO_MODE_NORM    0x00
#define b32_CHIP_BITS       0x04
#define b64_CHIP_BITS       0x00
#define bNORMAL_DATA_RATE   0x00
#define bDOUBLE_DATA_RATE   0x02
#define b6X_OVERSAMPLING    0x00
#define b12X_OVERSAMPLING   0x01


#define REG_CONFIG          0x05    
#define bRADIO_BYPASS       0x20
#define bRX_INVERT          0x10
#define bTX_INVERT          0x08
#define bIRQ_OD             0x02
#define bIRQ_CMOS           0x00
#define bIRQ_ACTIVE_HIGH    0x01
#define bIRQ_ACTIVE_LOW     0x00

#define REG_SERDES_CTL      0x06    
#define bSERDES_ENABLE      0x08
#define mEND_OF_FRAME_LEN   0x07

#define REG_RX_INT_EN       0x07
#define bRX_UNDER_B         0x80    
#define bRX_OVER_B          0x40    
#define bRX_EOF_B           0x20    
#define bRX_FULL_B          0x10    
#define bRX_UNDER_A         0x08    
#define bRX_OVER_A          0x04    
#define bRX_EOF_A           0x02    
#define bRX_FULL_A          0x01    

#define REG_RX_INT_STAT     0x08
#define bRX_VALID_B         0x80    
#define bRX_VALID_A         0x08    
// other bits same as above (almost)

#define REG_DATA_RX_A       0x09
#define REG_VALID_RX_A      0x0a
#define REG_DATA_RX_B       0x0b
#define REG_VALID_RX_B      0x0c

#define REG_TX_INT_EN       0x0d
#define bTX_UNDER           0x08
#define bTX_OVER            0x04
#define bTX_EOF             0x02
#define bTX_EMPTY           0x01
//bits same as REG_RX_INT_EN except LSb of each nibble

#define REG_TX_INT_STAT     0x0e
// bits same as above

#define REG_DATA_TX         0x0f
#define REG_VALID_TX        0x10

#define REG_PN_CODE         0x11    
//Address 0x11 is LSB, 0x18 is MSB
//Transmit and receive LSB first

#define REG_THOLD_L         0x19    
#define mTHRESHOLD_L        0x7F

#define REG_THOLD_H         0x1a    
#define mTHRESHOLD_H        0x7F

#define REG_THRESHOLD_CNT   0x1b    // read only

#define REG_WAKE_EN         0x1C    
#define bWAKE_EN            0x01    

#define REG_WAKE_STAT       0x1D    
#define bWAKE_INT           0x01    // bWAKE_STAT


//Registers 0x1c - 0x1f are Reserved
#define REG_ANALOG_CTL  0x20    
#define bAGC_DISABLE RSSI_CTL       0x40    
#define bMFG_ID_EN  bMID_READ_EN        0x20    
#define bPACTL_EN           0x04
#define bPACTL_INVERT       0x02
#define bSYSTEM_RESET       0x01

#define REG_CHANNEL         0x21
#define bA_N_EN             0x80    
#define mCHANNEL            0x7f

#define REG_RSSI            0x22
#define bRSSI_VALID         0x20
#define mRSSI               0x1f

#define REG_PA              0x23    
//#define mLNA_GAIN         0x78
#define mPA_BIAS            0x07

#define REG_XTAL_ADJ        0x24
#define bCLOCK_DISABLE      0x40
#define mXTAL_ADJ           0x3f

#define REG_CAL_COUNT       0x25

#define REG_VCO_CAL         0x26
#define bMINUS5_PLUS5       0xc0
#define bMINUS2_PLUS3       0x80
#define mVCO_CAL            0x1f


    
#define REG_AGC_CTL         0x2E
#define bAGC_OFF            0x80

#define REG_TEST_B          0x2F
#define bCDET               0x80

#define REG_CLOCK_MANUAL    0x32
            
#define REG_CLOCK_ENABLE    0x33

#define REG_SYN_LOCK_CNT    0x38    

#define REG_MFG_ID_1        0x3C    // REG_MFG_ID
#define REG_MFG_ID_2        0x3D
#define REG_MFG_ID_3        0x3E
#define REG_MFG_ID_4        0x3F
#define RADIO_ID_1             0
#define RADIO_ID_2             1
#define RADIO_ID_3             2
#define RADIO_ID_4             3

#define FRAMER_NODATA   1
#define FRAMER_ERROR    2
#define FRAMER_GOOD     3

void radio_off(void);
void radio_on(void);
void radio_transmit_on(UINT8 channelvoid);
void radio_receive_on(UINT8 channelvoid);
void radio_switch_tx(voidset_channel(UINT8 channel);
void radio_switch_rx(void);
void radio_init(void);
void radio_set_pn_code(int pnCodeIndex);
void radio_transmit(UINT8, UINT8 *data);
void sleep(void);
void radio_rx_isr(void);
void radio_sleep(void);
void radio_wakeup(void);
UINT8 radio_get_id( UINT8 id );

extern UINT8 gChannelEof;
extern UINT8 gChannelBytes;
extern UINT8 gChannelValid[];
extern SYS_PARAMETERS sysParams;

#endif // _RADIO_H