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I need to buy CY37128P160-100AI of CYPRESS from the market to replace the old board. We know that this should be an IC out of production, and the specific time is unknown. However, the model we found in the market is CY37128P160-100AXI, and the product PDF found on the network does not contain this model. Have CYPRESS ever produced this lead-free product in the later period? When did CY37128P160-100AI stop production?

Hi ,

I am experiencing a break point notification when programming a CY8C6247BZI-D54 psoc6 device. I am setting up a CM0 app with 256Kb flash and 32Kb SRAM . I modified the linker scripts as per section 4.1.2 of the dual core design guide using GCC_ARM ld scripts. when I compile and load the code into the device I receive the following

Break at address "0x1f34" with no debug information available, or outside of program code.

I have double-checked the Linker scripts because I plan to change this to a dual core application. The Cm4 linker and CM0 linker scripts are adjusted correctly according to the documentation but this notification keeps happening

CM0  scrip change

ram (rwx) : ORIGIN = 0x08000000, LENGTH = 32768
flash (rx) : ORIGIN = 0x10000000, LENGTH = 262144

CM4 Script change

/* The size of the Cortex-M0+ application image at the start of FLASH */
FLASH_CM0P_SIZE = 262144;

ram (rwx) : ORIGIN = 0x08008000, LENGTH = 258048
flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x2000

This Looks correct according to the documentation, 

Any advice on why the above notification is happening?

Regards

C

Hello everyone,

I am currently using an s25fl256s flash memory, but when I try accessing it (using an SPI master on an Artix7 FPGA) the first read access has a delay of 19 clock cycle (more or less) and afterward the data is received correctly, does anyone know what causes the delay on the first read access ? According to the datasheet (Figure 67 Read command sequence (3-byte address, 03h [ExtAdd = 0])) there should be no delays : https://www.infineon.com/dgdl/Infineon-S25FL128S_S25FL256S_128_Mb_(16_MB)_256_Mb_(32_MB)_3.0V_SPI_Flash_Memory-DataSheet-v18_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecfb6a64a17

Hi,

I am looking use PD-EPR for 140W support in a sink application. Is there any plan to update the CYPD3177 to support EPR?

Thanks in advance.

I am working on a project for array readout. I am using CY8CKIT-059.

There are 8 analog inputs that I have to read  sequentially using the ADC and AMUX.

I was wondering if there is any way I can  connect all the other inputs to ground while only one of the analog inputs is connected to the ADC. 

Thanks in advance

Balu

Hi,

we face the same issue described here:

https://community.infineon.com/t5/USB-superspeed-peripherals/Bulk-In-data-streaming-hangs-on-CYUSB3KIT-001-DevKit-connected-to-USB-host/m-p/337795#M29950

The above topic is marked "resolved" but I don't think it is what you can see once you read it.
@Sergey if you read this:
Did you solve the issue in the meantime?

---

I found the post above and we also seem to have the same issue with interoperability of ASM3142 based host controllers of different manufactures (e.g. Logilink v.2 PC0080) and FX3.

1) If using IN transfers with our FX3 based device connected to a ASM3142 based host controller the "IN EP" hangs almost immediately when lange image transfer is started.
We use WinUSB driver and there is no BSOD.
The same problem is seen on different PCs with different of our FX3 based USB devices.

2) The Issue appears on Windows 10 only (never saw it on Linux or Windows 7)

3) Now also checked it with CYUSB3KIT-001 DevKit and Streamer App, SDK 1.3.4:

I can reproduce the errors Sergey has described with the Streamer application together with an ASM3142 based host controller including BSOD especially with large block size: Packets per Xfer 256 and XFers to Queue 64

4) The error is dependent on the ASM3142 Firmware version:

"191209_70_02_40" which seem to become the current version of most of the manufacturers of host controllers, always shows this error.

With a previous version of Asmedia 3142 Firmware "170308_70_02_00" the error does not occur.

This is also true for the check with DevKit and Streamer App!

5) There are no issues with other devices connected to ASM3142 of any firmware version which are not FX3 based.

---

Maybe you are able to reproduce the problem at Infineon by using the current ASM3142 firmware?

Regards
Guenter

Hi, 

I have some question about the filter mode of TIM.

1. The up/down counter mode with rising edge, after F_OUT reaches High level, does the FLT_CNT decremented?

2. The Hold counter mode with rising edge, after F_OUT reaches High level, how does the FLT_CNT reset? If the cnt can't be reset, does it means the filter only can work one time?

Best Regards

Jamber

Hi supporting,

After downloaing the latest EZUSB-SX3_Configuration_Utility_Installer_Linux_v1_0_0_3.zip, and trying to update the CYUSB3KIT-004 but the files  sx3_explorer_kit_uvc_uac_crosslink_slavefifo.zip and sx3_explorer_kit_uvc_uac_crosslink_rpi.zip are not found. Can some one help me how can I got those two files. Without that I cannot test the defautl UVC camera board. Thanks!

BR,

Winner