XMC™ Forum Discussions
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Hi,
ECAT_PHY_RESET line is between the XMC4800 and Broadcom Ethernet Transceiver. ECAT_PHY_RESET is pulled-down.
I want to hold the PHY (Broadcom Ethernet Transceiver) in reset.
I was able to verify that PHY is reset after running "XMC_ECAT_Disable()".
Is XMC_ECAT_Disable() the right away to reset PHY or is there a better way to reset PHY?
GPIO operations did not reset PHY.
Please advise. thank you in advance.
thank you,
Show LessHi,
My project doesn't have startup file, project is executed as a function from boot code which is runned through RAM.
We need to install ISR vector address manually using NVIC_SetVector API.
I am facing like "USIC2_3_IRQHandler' are undeclared .
Kindly help in resolving the issue.
Show Less
does anyone have a App or library for using OneWire/1 -Wire EEPROMs, Sensors, with the XMC series?
Thanks
Hi,
Our project is an ECAT Slave running on XMC4800 144 pin.
Write attempts to EtherCAt Slave Controller registers (ESC registers) do not change the register values. e.g. SynchManager registers like "PDI Control SyncManager x ". We can read these registers, however we can not write to these registers.
Any help would be great.
Show Less
Hi,
I have a system with different interrupts running, some which sets FreeRTOS events.
It was working fine, until I defined a new PIN interrupt:
void AdcRdyIRQHandler(void)
{
BaseType_t xHigherPriorityTaskWoken; // = SetGroupEventFromISR(xLoadcellTaskEventGroup, evADCReady);
xEventGroupSetBitsFromISR(xLoadcellTaskEventGroup, evADCReady, &xHigherPriorityTaskWoken);
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
}
If I comment the two FreeRTOS lines in the ADCRdyIRQ (SetBits... and portYIELD...), the problem disappears.
So I know it has something to do with the FreeRTOS calls, but I'm stuck now.
The failure is shown below:
Thread #1 57005 (Suspended : Signal : SIGTRAP:Trace/breakpoint trap)
VADC0_G3_3_IRQHandler() at startup_XMC4400.S:353 0x8000298
<signal handler called>() at 0xfffffffd
ERU0_3_IRQHandler() at ADC.c:350 0x8000976
0x0
Where ADC.c:350 is dissassembly:
349 portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
08000960: ldr r3, [r7, #4]
08000962: cmp r3, #0
08000964: beq.n 0x8000976 <ERU0_3_IRQHandler+54>
08000966: ldr r3, [pc, #28] ; (0x8000984 <ERU0_3_IRQHandler+68>)
08000968: mov.w r2, #268435456 ; 0x10000000
0800096c: str r2, [r3, #0]
0800096e: dsb sy
08000972: isb sy
350 }
08000976: adds r7, #8
08000978: mov sp, r7
0800097a: pop {r7, pc}
0800097c: ldmia r3, {r2, r3, r5, r6}
0800097e: subs r7, r7, #7
08000980: ldmia r3!, {r6, r7}
08000982: subs r7, r7, #7
08000984: stc 0, cr14, [r4, #-0]
The Registers:
r7 0x20001f90 (Hex)
r8 0xa5a5a5a5 (Hex)
r9 0xa5a5a5a5 (Hex)
r10 0xa5a5a5a5 (Hex)
r11 0xa5a5a5a5 (Hex)
r12 0xa5a5a5a5 (Hex)
sp 0x1fffc780
lr 0x800a6f9 (Hex)
pc 0x8000976 <ERU0_3_IRQHandler+54>
xpsr 0x21000014 (Hex)
msp 0x1fffc760 (Hex)
psp 0x20001f70 (Hex)
primask 0
basepri 0
faultmask 0
control 0
Hello!
I am working on a project that is evaluating the XMC7000. I saw this app note AN35060 that describes a CAN bootloader for XMC7000 bootloader. It seems quite detailed so I am assuming there is an example or code somewhere that implements this, but I cannot find it.
Can one of the Infineon team help me identify if there is code for this bootloader available or not?
Show Lesshi we are getting undefined reference to `malloc_align'.
code is
void *th_aligned_malloc_x( size_t size, size_t align, const char *file, int line )
{
void *p;
/* avoid warnings since we are not using these */
file=file;
line=line;
p=malloc_align( size, align); /* file, line );*/
this malloc_align is called at
#if defined( NO_ALIGNED_ALLOC )
#define malloc_aligned(size, align) malloc(size)
#define free_aligned(base) free(base)
#else
#if _MSC_VER
#define malloc_aligned(size, align) _aligned_malloc(size, align)
#define free_aligned(base) _aligned_free(base)
#else
#define malloc_aligned(size, align) ({void *p; (posix_memalign(&p, align, size) == 0) ? p : NULL;})
#define free_aligned(base) free(base)
#endif
Hi, I am using XMC1400 Bootkit and Modus Toolbox. I am setting signals according to UART inputs (first two tracks) on 4 pins (6,7,8,9) of port 4 all defined in the same way on the BSP design.modus configurator and controlled with 4 identical pieces of code in the main.c but one of them, the P4_8 has inverted behavior (yellow track): it goes high when all others would go low.
Any idea what could be wrong ?
Thanks.
Julius
Show LessDear Receiver,
Does the baud rate of XMC4xxx reach 4Mb/s or higher ?!
Thank you so much.