XMC™ Forum Discussions

Hello there,

I am having an issue when trying to software reset an XMC4200 (tested with an XMC4500 too) and keep the microcontroller running while debugging.

What happens is, when I issue a reset it happens but the microcontroller gets stuck at the address pointed by the vector reset. I have read this may be because the VC_CORERESET flag in DEMCR, but I tried disabling that and still the same happens.

A supersimple example:

int main()
{	
        WR_REG(CoreDebug->DEMCR, CoreDebug_DEMCR_VC_CORERESET_Msk, CoreDebug_DEMCR_VC_CORERESET_Pos, 0);	
        SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) & SCB_AIRCR_VECTKEY_Msk) | SCB_AIRCR_SYSRESETREQ_Msk; 
        while(1)
                ;
}

If I run this with my JLink debugger I would like my board to reset all the time (at most, it would stop in a breakpoint @main if actived).

Does anyone know how I can achieve this?

Best regards, Show Less

Hello,

I'm looking for information about read/write wait states of each memory bank(PFLASH, PSRAM, DSRAM system,..).
Only the FCON(Flash Configuration Register) description provides details on the wait states for read access to PFLASH.

Can someone tell me where I can find these information?

µC: XMC4500-F100K1024


Thanks in advance,

Jerry Show Less

Hi,

I am using the XMC2Go for debugging and the 16 pin XMC1000 in circuit because the VQFN24 is still unavailable and I am wondering which files from a standard project that I should be modifying to be able to go from using one chip to another without having to recreate the project? There is enough complexity at this point that I can't really maintain two complete versions of the project. I am not doing code generation any longer either so that is not an issue.

Thanks,

Jason Show Less

XMC1000 Industrial Microcontrollers now available at Mouser Electronics.




Learn more about the XMC1000 Microcontrollers and get a full overview of the available parts at
http://bit.ly/mouser-xmc1000 Show Less

On page 14-230 of xmc100_rm_v1.1, in Table 14-24, under Clock Inputs, USIC0_CH1.DX1D is listed as connected to "0".
This seems most likely incorrect. Anyone care to venture a guess as to what it should be?

Show Less

Hi everybody,

is it possible to have two Ethernet ports with one XMC4500?

More specifically:

1) Using the Evaluation Kit, can I connect two COM satellite ports to a single XMC CPU Board?
2) I see that DAVE only allows a single ETH001 app, so is there any chance I can have two Ethernet ports and still develop with DAVE, or do I need my own OS?

The background for my question is that I want to communicate with two different networks from a single XMC4500 CPU board.

Thank you! Show Less

Hi...this is actually a repost i think..i forgot my other post, so i'll just start over with this one thou..hahaha

right now i was planning to build a hexapod robot,
and i'm trying to use the XMC4500 Relax Lite Kit as the main processor, old days I've always use the avr
So...I got other controller here which is p.Brain-u24 Hex Engine as the servo controller for the mechanism of the 6 legs,

and I cant connect the main processor and the servo controller,
i'm sorry but i really got no idea how to connect it....I2C? SPI? CAN? (usually I been using DAVE for programming tools)
could anybody help me bout this issue 🙂 🙂


If u want to contact me here is my email, nasihite@yahoo.com
I'm looking forward to it 🙂
Thanks a lot and God Bless

nb;
i'm a student in electrical engineering in Maranatha Christian University, Indonesia
I picked robotic as my interest..so this hexa dude (in process) could be my final project
and dont forgot to join IROF (Indonesia Robo Fest held in Bandung, sponsored by INFINEON of course 🙂 ) Show Less

Hi!

I want to set up the Delta Sigma demodulator to use it with an Avago ACPL 796. Here the clock is generated by the XMC4400 and the ACPL sends back the data stream.
I tried to set it up like I thought it is necessary but in the Result Register (RESMx) there only occur the values 0x0000 or 0x0001 or 0xffff.
Why are there only this 3 values??
The register DSD.EVFLAG says: "A new result has been stored in register RESMx (1)" for this channel.
How can I set up an Interrupt when a new result is stored in this register?

int32_t DSD_init(void)
{

	// Apply reset on DSD
	SCU_RESET->PRSET0 = SCU_RESET_PRSET0_DSDRS_Msk;

	// De-assert reset on DSD
	SCU_RESET->PRCLR0 = SCU_RESET_PRCLR0_DSDRS_Msk;

	// activated the DSD modul clock by resetting bit 1
	DSD->CLC &= (uint32_t)(~((uint32_t)0x01U));

  /*  Set divder factor for modulator clock ( 0x03UL = fCLK/8 ? = 15MHz)
      0H fMOD = fCLK / 2
      1H fMOD = fCLK / 4
      2H fMOD = fCLK / 6
      ...
      FH fMOD = fCLK / 32
  */
  DSD_CH0->MODCFG |=  (( 0x03UL << DSD_CH_MODCFG_DIVM_Pos ) & DSD_CH_MODCFG_DIVM_Msk) |
                       // Enable write access to MODCFG.DIVM
                      (( 0x01UL << DSD_CH_MODCFG_DWC_Pos ) & DSD_CH_MODCFG_DWC_Msk);
  DSD_CH1->MODCFG |=  (( 0x03UL << DSD_CH_MODCFG_DIVM_Pos ) & DSD_CH_MODCFG_DIVM_Msk)|
                      (( 0x01UL << DSD_CH_MODCFG_DWC_Pos ) & DSD_CH_MODCFG_DWC_Msk);
  //DSD_CH2->MODCFG |=  (( 0x03UL << DSD_CH_MODCFG_DIVM_Pos ) & DSD_CH_MODCFG_DIVM_Msk)|
  //                    (( 0x01UL << DSD_CH_MODCFG_DWC_Pos ) & DSD_CH_MODCFG_DWC_Msk);
  DSD_CH3->MODCFG |=  (( 0x03UL << DSD_CH_MODCFG_DIVM_Pos ) & DSD_CH_MODCFG_DIVM_Msk)|
                      (( 0x01UL << DSD_CH_MODCFG_DWC_Pos ) & DSD_CH_MODCFG_DWC_Msk);

  DSD_CH1->DICFG  = 0x00000000;

  //Input channel select
  //use B non inverted input for all channels
  DSD_CH0->DICFG |= (( 0x04UL << DSD_CH_DICFG_DSRC_Pos ) & DSD_CH_DICFG_DSRC_Msk)|  // B direct
                     // Enable write acces to DICFG.DSRC
                    (( 0x01UL << DSD_CH_DICFG_DSWC_Pos ) & DSD_CH_DICFG_DSWC_Msk);
  DSD_CH1->DICFG |= (( 0x04UL << DSD_CH_DICFG_DSRC_Pos ) & DSD_CH_DICFG_DSRC_Msk)|// B direct
                    (( 0x01UL << DSD_CH_DICFG_DSWC_Pos ) & DSD_CH_DICFG_DSWC_Msk);
  //DSD_CH2->DICFG |= (( 0x04UL << DSD_CH_DICFG_DSRC_Pos ) & DSD_CH_DICFG_DSRC_Msk)|// B direct
  //                  (( 0x01UL << DSD_CH_DICFG_DSWC_Pos ) & DSD_CH_DICFG_DSWC_Msk);
  DSD_CH3->DICFG |= (( 0x04UL << DSD_CH_DICFG_DSRC_Pos ) & DSD_CH_DICFG_DSRC_Msk)|// B direct
                    (( 0x01UL << DSD_CH_DICFG_DSWC_Pos ) & DSD_CH_DICFG_DSWC_Msk);


  //Integrator trigger mode set to active all the time
  DSD_CH0->DICFG |= (( 0x03UL << DSD_CH_DICFG_ITRMODE_Pos ) & DSD_CH_DICFG_ITRMODE_Msk)|
                    // Enable write acces to DICFG.TSTRMODE / TRSEL ITRMODE
                    (( 0x01UL << DSD_CH_DICFG_TRWC_Pos ) & DSD_CH_DICFG_TRWC_Msk);
  DSD_CH1->DICFG |= (( 0x03UL << DSD_CH_DICFG_ITRMODE_Pos ) & DSD_CH_DICFG_ITRMODE_Msk)|
                    (( 0x01UL << DSD_CH_DICFG_TRWC_Pos ) & DSD_CH_DICFG_TRWC_Msk);
  //DSD_CH2->DICFG |= (( 0x02UL << DSD_CH_DICFG_ITRMODE_Pos ) & DSD_CH_DICFG_ITRMODE_Msk)|
  //                  (( 0x01UL << DSD_CH_DICFG_TRWC_Pos ) & DSD_CH_DICFG_TRWC_Msk);
  DSD_CH3->DICFG |= (( 0x03UL << DSD_CH_DICFG_ITRMODE_Pos ) & DSD_CH_DICFG_ITRMODE_Msk)|
                    (( 0x01UL << DSD_CH_DICFG_TRWC_Pos ) & DSD_CH_DICFG_TRWC_Msk);


  //Data strobe
  //direct clock, a sample trigger is generated at each rising clock edge
    DSD_CH0->DICFG |= (( 0x02UL << DSD_CH_DICFG_STROBE_Pos ) & DSD_CH_DICFG_STROBE_Msk)|
                      // Enable write access to DICFG.TSTRMODE / TRSEL ITRMODE
                      (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
    DSD_CH1->DICFG |= (( 0x02UL << DSD_CH_DICFG_STROBE_Pos ) & DSD_CH_DICFG_STROBE_Msk)|
                      (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
    //DSD_CH2->DICFG |= (( 0x02UL << DSD_CH_DICFG_STROBE_Pos ) & DSD_CH_DICFG_STROBE_Msk)|
    //                  (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
    DSD_CH3->DICFG |= (( 0x02UL << DSD_CH_DICFG_STROBE_Pos ) & DSD_CH_DICFG_STROBE_Msk)|
                      (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);



  //Sample clock source select is set to  internal clock
  DSD_CH0->DICFG |= (( 0x0FUL << DSD_CH_DICFG_CSRC_Pos ) & DSD_CH_DICFG_CSRC_Msk)|
                     // Enable write acces to DICFG.STROBE, CSRC
                    (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
  DSD_CH1->DICFG |= (( 0x0FUL << DSD_CH_DICFG_CSRC_Pos ) & DSD_CH_DICFG_CSRC_Msk)|
                    (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
  //DSD_CH2->DICFG |= (( 0x0FUL << DSD_CH_DICFG_CSRC_Pos ) & DSD_CH_DICFG_CSRC_Msk)|
  //                  (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);
  DSD_CH3->DICFG |= (( 0x0FUL << DSD_CH_DICFG_CSRC_Pos ) & DSD_CH_DICFG_CSRC_Msk)|
                    (( 0x01UL << DSD_CH_DICFG_SCWC_Pos ) & DSD_CH_DICFG_SCWC_Msk);



  /* Select Modul clock
   * 000B Internal clock off, no source selected
   * 001B fDSD
   */
  DSD->GLOBCFG |= (( 0x01UL << DSD_GLOBCFG_MCSEL_Pos) & DSD_GLOBCFG_MCSEL_Msk);

  //Run all DSD
  DSD->GLOBRC |=  0x0BUL ; // Bit 0-3 = 1011 -> run ch0 ch1 ch3

  // Config GPIO
  // Config Clock ch0 out on P4.1 to Push-Pull Alternate function 3
 // PORT4->IOCR0 |= (( 0x13UL << PORT4_IOCR0_PC1_Pos ) & PORT4_IOCR0_PC1_Msk );
  // Config Clock ch1 out on P4.0 to Push-Pull Alternate function 3
  PORT4->IOCR0 |= (( 0x13UL << PORT4_IOCR0_PC0_Pos ) & PORT4_IOCR0_PC0_Msk );
  // Config Clock ch3 out on P3.4 to Push-Pull Alternate function 4
 // PORT3->IOCR4 |= (( 0x14UL << PORT3_IOCR4_PC4_Pos ) & PORT3_IOCR4_PC4_Msk );




  return 0;
}

Thanks for any answer.

Benedikt Show Less

Hi,

Anyone played with the resolver example : "Resolver_FOC_Motor_Example1.zip"
With encoder and hall sensor is working well, but not with resolver.

I have the right board now XMC4500 CPU_45A-V3 board and MOT_GPDLV-V2 board.

I want to readjust the parameters to run with a different motor and resolver

when i start the motor is sniping slowly (i think for auto tuning the angle). But after it`s starts to oscillate and potentiometer is not doing anything.
I tried different motor parameters but the same. I have Nanotec DB42S3 motor with 4 pole pairs.

They not specified anything about the resolver parameters like no of lobes. some are with 3 others with 4. so where i do adjust this?

I have default IQSTARTUP 2F and i do not know what is meaning.



Also the i do not know how thy calculate this value" Volt_DC 2915U "

Any help would be good.

Iulian Show Less

Hi everyone,

I want to use UART and DMA. The code should send out of UART some characters contained in a buffer using DMA. After reading many docs about UART and DMA, after fighting with DAVE examples and code, I was not successful. I believe that my code could be 99% correct because some chars are coming out but not as I want.
If I send buffer contained (0,1,2,3,4,5,6,7,8,9) only 3, 7 , 9 appear on serial output!
Can someone share code or provide assistance what should be the right configuration.
I want to accomplish following.
1. Use USIC0, all configuration
2. Use SR1 when Transmit buffer event occurs, and route this line to DLR of DMA
3. DMA configuration
4. Use DMA 0 channel 7
5. Select DLR line 7
6. Start transfer of fixed number of bytes

What are the diagnostic steps I can take to understand what is happening?
Thanks Show Less