XMC™ Forum Discussions
XMC™
Hello,just trying to implement the example: USBD_MS_BOOTLOADER_IAP_XMC47Without any optimization level it seems to be working on my XMC4800.But if I'm...
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Hello,
just trying to implement the example: USBD_MS_BOOTLOADER_IAP_XMC47
Without any optimization level it seems to be working on my XMC4800.
But if I'm using any of the given optimization levels, the abm header is no longer available.
lst-file:
With optimization (-Os)
No optimization
I think something needs to be protect if any optimization is active:
main.c:
linker_script.ld:
Thanks for any hints.
Regards,
TestJoe Show Less
just trying to implement the example: USBD_MS_BOOTLOADER_IAP_XMC47
Without any optimization level it seems to be working on my XMC4800.
But if I'm using any of the given optimization levels, the abm header is no longer available.
lst-file:
With optimization (-Os)
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00004744 08000000 0c000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 Stack 00000800 1ffe8000 1ffe8000 00018000 2**0
ALLOC
2 .data 000000b8 1ffe8800 0c004744 00010800 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 0000072c 1ffe88b8 0c0047fc 000108b8 2**2
No optimization
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000076dc 08000000 0c000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .abm 00000014 0800ffe0 0c00ffe0 00017fe0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 Stack 00000800 1ffe8000 1ffe8000 00018000 2**0
ALLOC
3 .data 000000b8 1ffe8800 0c0076dc 00010800 2**2
CONTENTS, ALLOC, LOAD, DATA
4 .bss 0000072c 1ffe88b8 0c007794 000108b8 2**2
I think something needs to be protect if any optimization is active:
main.c:
#define ABM_HEADER_MAGIC_KEY 0xA5C3E10F
typedef struct ABM_Header {
uint32_t MagicKey; /**< Magic key. Always 0xA5C3E10F */
uint32_t StartAddress; /**< Start address of the programm to load */
uint32_t Length; /**< Length of the programm to load. */
uint32_t ApplicationCRC32; /**< CRC32 Sum of the complete application code */
uint32_t HeaderCRC32; /**< CRC32 Sum of the four fields before */
} ABM_Header_t;
static const ABM_Header_t __attribute__((section(".flash_abm")))
ABM0_Header = {
.MagicKey = ABM_HEADER_MAGIC_KEY,
.StartAddress = 0x08020000, /* Start Flash Physical Sector 8 */
.Length = 0xFFFFFFFF,
.ApplicationCRC32 = 0xFFFFFFFF,
.HeaderCRC32 = 0xEF423163 // for .StartAddress = 0x08020000
};
linker_script.ld:
.abm ABSOLUTE(0x0800FFE0): AT(0x0800FFE0 | 0x04000000)
{
KEEP(*(.flash_abm))
} > FLASH_1_cached
Thanks for any hints.
Regards,
TestJoe Show Less
XMC™
Good day,I have read "XMC4500 Reference Manual" chapter 8.4.8 Flash Protection, but it is still unclear for me how it should be realized?Say, I choos...
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Good day,
I have read "XMC4500 Reference Manual"
chapter 8.4.8 Flash Protection, but it is still unclear for me how it should be realized?
Say, I choose to set up "Flash Read Protection", using option:
– UCB0: Read protection that can be disabled with the password of UCB0 for whole Flash.
For that, I shall set bit PROCON0[15] = RPRO = 1 in UCB0
Meanwhile, description for it says:
This bit indicates whether read protection is
configured for PFLASH by user 0.
0B No read protection configured
1B Read protection and globalwrite protection is
configured by user 0 (master user)
So, looks like it is Global R/W Protection bit.
Bits PROCON0[0:10] - write protection per sectors - can be used independently.
A “UCB” is a specific logical sector contained in the configuration sector.
Apparently, UCB blocks are not affected, when whole Flash is erased by Programmator.
As far UCB blocks may be rewritten reliably only 4 times!
It means theoretically, that if only "Read Protection" was installed, you are able to rewrite Flash, but as far protection still in place,
you do not able to verify it without erasing UCB0 block as well, applying special procedure.
Global R/W Protection as well may be disabled temporary, o.w. until next System Reset. It is used in MemTool. (See below)
But, it requires ASC Bootstrap connection - through P1.4 RxD, P1.5 TxD lines.
BR
K Show Less
I have read "XMC4500 Reference Manual"
chapter 8.4.8 Flash Protection, but it is still unclear for me how it should be realized?
Say, I choose to set up "Flash Read Protection", using option:
– UCB0: Read protection that can be disabled with the password of UCB0 for whole Flash.
For that, I shall set bit PROCON0[15] = RPRO = 1 in UCB0
Meanwhile, description for it says:
This bit indicates whether read protection is
configured for PFLASH by user 0.
0B No read protection configured
1B Read protection and globalwrite protection is
configured by user 0 (master user)
So, looks like it is Global R/W Protection bit.
Bits PROCON0[0:10] - write protection per sectors - can be used independently.
A “UCB” is a specific logical sector contained in the configuration sector.
Apparently, UCB blocks are not affected, when whole Flash is erased by Programmator.
As far UCB blocks may be rewritten reliably only 4 times!
It means theoretically, that if only "Read Protection" was installed, you are able to rewrite Flash, but as far protection still in place,
you do not able to verify it without erasing UCB0 block as well, applying special procedure.
Global R/W Protection as well may be disabled temporary, o.w. until next System Reset. It is used in MemTool. (See below)
But, it requires ASC Bootstrap connection - through P1.4 RxD, P1.5 TxD lines.
BR
K Show Less
XMC™
I want to slow the motor speed update rate to once every 10 seconds or so without jitter. My BLDC SCALAR HALL XMC13 UCProbe motor kit currently updat...
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I want to slow the motor speed update rate to once every 10 seconds or so without jitter. My BLDC SCALAR HALL XMC13 UCProbe motor kit currently updates once per second. To eliminate speed jitter how can I delay the speed update rate with the XMC1300 microcontroller? PI setting or motor parameters??? The motor controls an optical sensor for cycle time. I need to eliminate PERIOD jitter. NEED CONSTANT RPM!!!
Any assistance is greatly appreciated
Jon Show Less
Any assistance is greatly appreciated
Jon Show Less
XMC™
hiim using the xmc1302 microcontroller with a rotatory encoder. My idea is to generate a interrupt with the rise flag of the index signal. I did this ...
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hi
im using the xmc1302 microcontroller with a rotatory encoder. My idea is to generate a interrupt with the rise flag of the index signal. I did this code but i got a mistake.
Can someone help me to solve it?
I leave my code attached
Thanks Show Less
im using the xmc1302 microcontroller with a rotatory encoder. My idea is to generate a interrupt with the rise flag of the index signal. I did this code but i got a mistake.
Can someone help me to solve it?
I leave my code attached
Thanks Show Less
XMC™
Hi,I would like to produce the following pulse sequence:_|_|_|____|_|_|____|_|_|____...|_|_|____________________________|_|_|____|_|_|____tp = 2µst1 =...
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Hi,
I would like to produce the following pulse sequence:
_|_|_|____|_|_|____|_|_|____...|_|_|____________________________|_|_|____|_|_|____
tp = 2µs
t1 = 50µs
t2 = 370µs
t3 = 2000µs
After each pulse the ADC should store several conversions in an array.
Thanks to AP32287, I was able to generate the pulses successfully.
Also the conversions I could make thanks to the AP32287.
http://www.infineon.com/dgdl/Infineon-CCU4-XMC1000_XMC4000-AP32287-AN-v01_01-EN.pdf?fileId=5546d4624e765da5014ed8dd0f4614c0
Both together were not possible.
It failed, in my opinion, that I can not move any function into another slice.
What can I do?
Is my approach the right one?
Are there better solutions?
I would like to use the XMC library and not the DAVE apps.
I changed:
#define SYNC_SLICE CCU40_CC40 -> CCU40_CC41
#define SYNC_SLICE_NR (0U) -> (1U)
#define SLICE0_PTR CCU40_CC40 -> CCU40_CC41
#define SLICE0_NUMBER (0U) -> (1U)
Both times worked nothing more Show Less
I would like to produce the following pulse sequence:
_|_|_|____|_|_|____|_|_|____...|_|_|____________________________|_|_|____|_|_|____
tp = 2µs
t1 = 50µs
t2 = 370µs
t3 = 2000µs
After each pulse the ADC should store several conversions in an array.
Thanks to AP32287, I was able to generate the pulses successfully.
Also the conversions I could make thanks to the AP32287.
http://www.infineon.com/dgdl/Infineon-CCU4-XMC1000_XMC4000-AP32287-AN-v01_01-EN.pdf?fileId=5546d4624e765da5014ed8dd0f4614c0
Both together were not possible.
It failed, in my opinion, that I can not move any function into another slice.
What can I do?
Is my approach the right one?
Are there better solutions?
I would like to use the XMC library and not the DAVE apps.
I changed:
#define SYNC_SLICE CCU40_CC40 -> CCU40_CC41
#define SYNC_SLICE_NR (0U) -> (1U)
#define SLICE0_PTR CCU40_CC40 -> CCU40_CC41
#define SLICE0_NUMBER (0U) -> (1U)
Both times worked nothing more Show Less
XMC™
Dear All,The part number is : XMC1300 series, XMC1302-Q040X0064 I have configured CCU8_CCU80 slice for PWM generation. As per the configuration SR0 is...
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Dear All,
The part number is : XMC1300 series, XMC1302-Q040X0064
I have configured CCU8_CCU80 slice for PWM generation.
As per the configuration SR0 is selected for Interrupt and is working fine, ISR is getting executed.
But when I m selecting SR1 or SR2, ISR is not executed.
Below API is being used
As per reference manual SR0, SR1, SR2 are connected to.
If I am selecting SR0 then ISR is executed.
In SR1 also NVIC is there but still ISR is not executed.
If selecting SR1 or SR2 then ISR is not executed.
Could any one please explain and guide me.
Regards,
Tinchu Show Less
The part number is : XMC1300 series, XMC1302-Q040X0064
I have configured CCU8_CCU80 slice for PWM generation.
As per the configuration SR0 is selected for Interrupt and is working fine, ISR is getting executed.
But when I m selecting SR1 or SR2, ISR is not executed.
Below API is being used
/* Connect period match and one match event to SR0 */
XMC_CCU8_SLICE_SetInterruptNode(SLICE0_PTR,
XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH,
XMC_CCU8_SLICE_SR_ID_0);
As per reference manual SR0, SR1, SR2 are connected to.
==================================================================
CCU80.SR0 NVIC; Service request line
CCU80.SR1 NVIC; Service request line
POSIF0.MSETE;
CCU80.SR2 VADC0.BGREQTRI; Service request line
VADC0.G0REQTRI;
VADC0.G1REQTRI;
ERU0.OGU03;
ERU0.OGU13;
==================================================================
If I am selecting SR0 then ISR is executed.
In SR1 also NVIC is there but still ISR is not executed.
If selecting SR1 or SR2 then ISR is not executed.
Could any one please explain and guide me.
Regards,
Tinchu Show Less
XMC™
Hello XMC users.Now I'm trying to execute webserver example on the library.I added HTTP_SERVER_0 App in to App dependency and followed the step by the...
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Hello XMC users.
Now I'm trying to execute webserver example on the library.
I added HTTP_SERVER_0 App in to App dependency and followed the step by the HTTP_SERVER_0 App usage.
But it didn't work, the webpage didn't show like the usage said and the IP refused my access.
I set the IP setting; IP address into ETH_LWIP_0 App : 192.168.0.10, Subnet Mask : 255.255.255.0 and Gateway address:0.0.0.0 .
My kit is XMC-4400, the kit on the usage is XMC-4500 tho.
I think that's not the problem that couldn't work.
Please, let me know how to it works or related examples about connection.
Thanks in advance and I upload my project. Show Less
Now I'm trying to execute webserver example on the library.
I added HTTP_SERVER_0 App in to App dependency and followed the step by the HTTP_SERVER_0 App usage.
But it didn't work, the webpage didn't show like the usage said and the IP refused my access.
I set the IP setting; IP address into ETH_LWIP_0 App : 192.168.0.10, Subnet Mask : 255.255.255.0 and Gateway address:0.0.0.0 .
My kit is XMC-4400, the kit on the usage is XMC-4500 tho.
I think that's not the problem that couldn't work.
Please, let me know how to it works or related examples about connection.
Thanks in advance and I upload my project. Show Less
XMC™
We are experimenting with the QR Buck LED Driver XMC14 demo (VD_QR_BUCK_LED_DRIVER_01). The demo does not appear to enter into quasi-resonant switchi...
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We are experimenting with the QR Buck LED Driver XMC14 demo (VD_QR_BUCK_LED_DRIVER_01). The demo does not appear to enter into quasi-resonant switching as designed.
Checking the hardware connections it appears that there is a good signal at the ZCD pin. However, it does not appear to trigger next switching cycle.
Instead the switching cycle is triggered by timeout of maximum off-time.
Can anyone from Infineon comment on this issue? Is the QR Buck LED Driver Example code fully functional? Show Less
Checking the hardware connections it appears that there is a good signal at the ZCD pin. However, it does not appear to trigger next switching cycle.
Instead the switching cycle is triggered by timeout of maximum off-time.
Can anyone from Infineon comment on this issue? Is the QR Buck LED Driver Example code fully functional? Show Less
XMC™
We have two UART APPs (Channels USIC0CH0 and USIC0CH1) in a single Project. We are facing an Issue while changing the UART Baudrate during Runtime in...
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We have two UART APPs (Channels USIC0CH0 and USIC0CH1) in a single Project. We are facing an Issue while changing the UART Baudrate during Runtime in DAVE 4.3.2. We are able to execute the same thing in DAVE 3.1.8. We are using " UART_SetBaudrate(&UART_1, (uint32_t)4800 , 9)" line to change the baudrate in DAVE 4.3.2. We kindly request all of you to help us resolve this issue ASAP.
Shaunak Agastya Vyas Show Less
Shaunak Agastya Vyas Show Less
XMC™
I'm trying to do a simple interrupt receiver for the UART and, while it works fairly well, I have encountered that sometimes not all characters are re...
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I'm trying to do a simple interrupt receiver for the UART and, while it works fairly well, I have encountered that sometimes not all characters are received, later on,
when more characters are sent, the lost characters appear, as if they have been waiting all the time in the buffer even though the buffer reported it was empty.
After several test I've found that, when using receive buffer, the interrupt only triggers when the fill level of the buffergets bigger than LIMIT. While this would seem ok,
so it helps to reduce interrupt overhead, the result is that some data may be lost.
i.e: if RBCTR.SIZE=1 (two words in buffer) and RBCTR.LIMIT=1 the receive interrupt is triggered every time the buffer holds two words. The result is that any message with an even
number of characters is received correctly while, any message with an odd number of characters is missing the last word because the interrupt will never be triggered.
Something similar will happen for RBCTR.SIZE=5 and RBCTR.LIMIT=5, all the messages that are not multiple of five in size will never be completely received, until more words
are recevied (maybe the next message)
For now I've solved the problem setting RBCTR.LIMIT to zero but this renders the buffer functionality almost useless because one interrupt per word is generated and, at high speeds,
this is not desirable.
Is there a way to recover those words still in the buffer or am I missing something?
Best Regards. Show Less
when more characters are sent, the lost characters appear, as if they have been waiting all the time in the buffer even though the buffer reported it was empty.
After several test I've found that, when using receive buffer, the interrupt only triggers when the fill level of the buffergets bigger than LIMIT. While this would seem ok,
so it helps to reduce interrupt overhead, the result is that some data may be lost.
i.e: if RBCTR.SIZE=1 (two words in buffer) and RBCTR.LIMIT=1 the receive interrupt is triggered every time the buffer holds two words. The result is that any message with an even
number of characters is received correctly while, any message with an odd number of characters is missing the last word because the interrupt will never be triggered.
Something similar will happen for RBCTR.SIZE=5 and RBCTR.LIMIT=5, all the messages that are not multiple of five in size will never be completely received, until more words
are recevied (maybe the next message)
For now I've solved the problem setting RBCTR.LIMIT to zero but this renders the buffer functionality almost useless because one interrupt per word is generated and, at high speeds,
this is not desirable.
Is there a way to recover those words still in the buffer or am I missing something?
Best Regards. Show Less