XMC™ Forum Discussions

Hi.

I try to calculate a crc32 with a pc program in the same matter than the build in crc unit.

I need this for a bootloader, to calculate the crc from a complet hex-file and want to check this from the infineon.

But i can't find a algorithm, that gives the same result as the CRC-Kernel.


Has anyone a source-code?

I use Kernal 0 (IEEE802.3 CRC32), configure CRCCfg.kernel_ptr->CFG to 0x0,
Seedval: 0

The Infineon use this lookuptable:

uint32_t  crctab[256] = {
    0x00000000, 0x04c11db7, 0x09823b6e, 0x0d4326d9,
    0x130476dc, 0x17c56b6b, 0x1a864db2, 0x1e475005,
    and so on....

I try this algorithm:

 uint32_t GetCRC32(unsigned long iLengt, unsigned char *pBuffer)
{
    uint32_t CRC = 0;

    while(iLengt--)
    {
        CRC = (CRC >> 😎 ^ crctab[(CRC & 0xFF) ^ *pBuffer++];
    }
   return CRC
}

I test it with one long:
Input: 0x20000800

Infineon returns in RES or CRC: 0x60A105A3
The algroritm returns: 0x2BD0DB09

It seems, the Infineon is flipping the Bytes, becouse, if i use 0x00000001 as input, the Chip returns: 0x04c11db7.
If i try to flipp the bytes in the same matter in the pc program, i get: 0x0797C360. Show Less

Hello...I am using XMC4800 microcontroller for EtherCAT application. For my application HIB_IO pins are not required. I am providing an external coin cell battery of 3V to VBAT pin. So my question is, is it safe to just leave the HIB_IO pins non connected? If it is not safe Please tell me whether I should connect a pull down or pull up resistor. Also I have not used some of the GPIO pins. So is it safe to leave them non connected. Please help me to find out.


Thank You Show Less

Hello,

I can only program my board by USB, but I want to use Jlink because I already have the power on board.
In this board there is 2 processors and one for debug, may be it keep priority on debug.

So I connect it on the connector X5 but when I run the debug on DAVE, an error appear.

Connecting to J-Link...
J-Link is connected.
Firmware: J-Link V10 compiled Jul 23 2018 09:53:14
Hardware: V10.10
S/N: 50111665
Feature(s): GDB
Checking target voltage...
Target voltage: 3.04 V
Listening on TCP/IP port 2331
Connecting to target...ERROR: Could not find core in Coresight setup
ERROR: Could not connect to target.
Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
Shutting down...
Could not connect to target.
Please check power, connection and settings.


I run Jlink.exe and try connected by connect



But still don't work.

If someone have an answer! Thank you. Show Less

The examples distributed as of today are compatible to the EtherCAT Slave Stack Code 5.11 which is distributed by the ETG.
The examples are not compatible to the EtherCAT Slave Stack Code 5.12 in minor aspects. However the differences are minor, the compilation will not work out of the box.
We will release an update of the ECAT_APP in the short term to overcome these compatibility issues.
Beside the pure APP also all EtherCAT related examples will be updated.

Until then please use SSC5.11 from the ETG. Show Less

Hi,

I'm using the port pins P0.14 and P0.15 as SWD and SWCLK but these pins are also used as a digital output in my code.
I can write the code in flash and everything is working, but these two outputs are not.

What can I do? Change the outputs isn't a choice.

Best regards. Show Less

Here the IRQ is generated on SR0

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
XMC_UART_CH_SetInterruptNodePointer(XMC_UART0_CH1, 0);
XMC_UART_CH_EnableEvent(XMC_UART0_CH1, XMC_UART_CH_EVENT_TRANSMIT_BUFFER);

XMC_UART_CH_Start(XMC_UART0_CH1);

NVIC_SetPriority(USIC0_0_IRQn, 1);
NVIC_EnableIRQ(USIC0_0_IRQn);


void USIC0_0_IRQHandler(void) {

}
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>


Here the IRQ should be generated on SR1, not working no IRQ, what ist wrong here ?

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
XMC_UART_CH_SetInterruptNodePointer(XMC_UART0_CH1, 1); //SR1
XMC_UART_CH_EnableEvent(XMC_UART0_CH1, XMC_UART_CH_EVENT_TRANSMIT_BUFFER);

XMC_UART_CH_Start(XMC_UART0_CH1);

NVIC_SetPriority(USIC0_1_IRQn, 1);
NVIC_EnableIRQ(USIC0_1_IRQn);


void USIC0_1_IRQHandler(void) {

}
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> Show Less

Hi,
I build an QR Flyback with an XMC1302 but I need reduce the power consumption as far as possible during startup.
The Aux Cap is charged by a current source (~15mA), but im not able to get lower then ~4mA.

What i woud like to do is:
1. Startup:
scale down clock to 100kHz <-> 1MHz
setup timer to generate an wakeup isr after 5 <-> 25 ms
go to deep sleep

2. Sleep Loop
start ADC, check Aux Voltage
Vaux > Setvalue ? Running : Sleep Loop

3. Running
scale up clock to 32MHz / 64MHz
Init peripheral
start Flyback (softstart)

Running mode is working just fine, control loop, light load / full load jumps, vally skipping, etc.

To check the power consumption i use this test code

int main(void){
  uint32_t TimerId_SysTick_1s;
  uint32_t TimerId_SysTick_10ms;
  uint32_t timer_status;
  DAVE_STATUS_t status;

  //pre Init IO for Debugging
  DIGITAL_IO_Init(&POWERLINE_MODUL_EN_pin);
  DIGITAL_IO_SetOutputHigh(&POWERLINE_MODUL_EN_pin);

  //init cpu Clock
  CLOCK_XMC1_Init(&CLOCK_XMC1_0);

  //gate every peripheral by API
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_VADC);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU80);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU40);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USIC0);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_BCCU0);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF0);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_MATH);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_WDT);
  XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_RTC);

  //gate every peripheral by Reg
  SCU_CLK->CGATSET0 = 0x07FFUL;		                        // Gate Off all peripherals
  WR_REG(SCU_CLK->CLKCR, SCU_CLK_CLKCR_CNTADJ_Msk, SCU_CLK_CLKCR_CNTADJ_Pos,(0x3FFU));


  COMPARATOR->ANACMP0 |= COMPARATOR_ANACMP0_CMP_LPWR_Msk;	// Put Comparator into low power mode
  COMPARATOR->ANACMP0 &= ~(COMPARATOR_ANACMP0_CMP_EN_Msk);	// Disable ACMP0
  COMPARATOR->ANACMP1 &= ~(COMPARATOR_ANACMP1_CMP_EN_Msk);	// Disable ACMP1
  COMPARATOR->ANACMP2 &= ~(COMPARATOR_ANACMP2_CMP_EN_Msk);	// Disable ACMP2

  //reduce peripheral Clock
  XMC_SCU_CLOCK_SetFastPeripheralClockSource(XMC_SCU_CLOCK_PCLKSRC_MCLK);

  //scale down cpu clock
  CLOCK_XMC1_SetMCLKFrequency(125);

  SCU_CLK->PWRSVCR |= SCU_CLK_PWRSVCR_FPD_Msk;		         // make sure flash powers down during deep sleep
  PPB->SCR |= PPB_SCR_SLEEPDEEP_Msk;		                 // Setup for Deep Sleep instead of normal sleep

  __disable_irq();   				                 //disable all interrupts

  //debugging
  DIGITAL_IO_SetOutputLow(&POWERLINE_MODUL_EN_pin);

  while(1){
    if(sleep_en){
      __WFI();
    }
    DIGITAL_IO_ToggleOutput(&POWERLINE_MODUL_EN_pin);
  }


//======================================================================
//============= Running Mode 
//======================================================================

  status = DAVE_Init();           /* Initialization of DAVE APPs  */

  if(status != DAVE_STATUS_SUCCESS){
    XMC_DEBUG("DAVE APPs initialization failed\n");
    while(1U){}
  }

  NetzPLL_Init();								//init Mains PLL
  NetzMonitor_Init();							//init Mains Monitor
  Fly_Control(1); 								//init Flyback

How can i further reduce the current consumtion? Or where is my misstake?

Thanks a lot for your support!

Best Regards,
Sascha Show Less

Hello,

I am using CAN auto baud rate detection example provided by Infineon. Below are the modification details which are done in example to port in our code.

Software changes:
1. CAN frequency configured to 60MHz instead of 12MHz
2. Polling based mechanism is implemented instead of interrupt based mechanism to read the CFC in Bit timing analysis mode.

We are not getting correct Baud rate prescaler (BRP) value by using the example, but we are getting proper Tseq1 and Tseq2 value from table which are given in example code.

Is there any way to get correct BRP value?

Regards
Khageshc Show Less

I call function

SPITransferStream((const uint16_t * const)&tx_frame, (const uint16_t * const)&rx_frame, 8);
all is working

This doesn't work, i got a Busfault Trap
SPITransferStream((const uint16_t * const)&tx_frame, (const uint16_t * const)&rx_frame, 16);

Here is my code:

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
#define FIFO_MODE

#define SPI_MISO P2_2
#define SPI_MOSI P2_5
#define SPI_SCLK P2_4


static const XMC_SPI_CH_CONFIG_t spi_config = {

.baudrate = 10000000,
.bus_mode = XMC_SPI_CH_BUS_MODE_MASTER,
.selo_inversion = XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS,
.parity_mode = XMC_USIC_CH_PARITY_MODE_NONE
};

static const XMC_DMA_CH_CONFIG_t dma_ch_recv_config = {

#ifdef FIFO_MODE
.src_addr = (uint32_t)&(XMC_SPI0_CH1->OUTR),
#else
.src_addr = (uint32_t)&(XMC_SPI0_CH1->RBUF),
#endif
.src_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.dst_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.src_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE,
.dst_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT,
.src_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
.dst_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
.transfer_flow = XMC_DMA_CH_TRANSFER_FLOW_P2M_DMA,
.transfer_type = XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK,
.src_handshaking = XMC_DMA_CH_SRC_HANDSHAKING_HARDWARE,
.src_peripheral_request = DMA0_PERIPHERAL_REQUEST_USIC0_SR1_2,
.enable_interrupt = true,
.priority = 7
};


static const XMC_DMA_CH_CONFIG_t dma_ch_send_config = {

#ifdef FIFO_MODE
.dst_addr = (uint32_t)&(XMC_SPI0_CH1->IN),
#else
.dst_addr = (uint32_t)&(XMC_SPI0_CH1->TBUF),
#endif
.src_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.dst_transfer_width = XMC_DMA_CH_TRANSFER_WIDTH_16,
.src_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_INCREMENT,
.dst_address_count_mode = XMC_DMA_CH_ADDRESS_COUNT_MODE_NO_CHANGE,
#ifdef FIFO_MODE
.src_burst_length = XMC_DMA_CH_BURST_LENGTH_8,
.dst_burst_length = XMC_DMA_CH_BURST_LENGTH_8,
#else
.src_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
.dst_burst_length = XMC_DMA_CH_BURST_LENGTH_1,
#endif
.transfer_flow = XMC_DMA_CH_TRANSFER_FLOW_M2P_DMA,
.transfer_type = XMC_DMA_CH_TRANSFER_TYPE_SINGLE_BLOCK,
.dst_handshaking = XMC_DMA_CH_DST_HANDSHAKING_HARDWARE,
.dst_peripheral_request = DMA0_PERIPHERAL_REQUEST_USIC0_SR0_0,
//.enable_interrupt = true,
};


void SPITransferStream(const uint16_t * const src, const uint16_t *const dst, const uint32_t length) {

XMC_DMA_CH_ClearDestinationPeripheralRequest(XMC_DMA0, 1);
XMC_SPI_CH_TriggerServiceRequest(XMC_SPI0_CH1, 0);


XMC_DMA_CH_SetBlockSize(XMC_DMA0, 0, length);
XMC_DMA_CH_SetBlockSize(XMC_DMA0, 1, length);

XMC_DMA_CH_SetDestinationAddress(XMC_DMA0, 0, (uint32_t)dst);
XMC_DMA_CH_SetSourceAddress(XMC_DMA0, 1, (uint32_t)src);

XMC_DMA_CH_Enable(XMC_DMA0, 0);
XMC_DMA_CH_Enable(XMC_DMA0, 1);
}


void GPDMA0_0_IRQHandler(void) {

XMC_DMA_CH_ClearEventStatus(XMC_DMA0, 0, XMC_DMA_CH_EVENT_TRANSFER_COMPLETE);
XMC_DMA_CH_ClearEventStatus(XMC_DMA0, 1, XMC_DMA_CH_EVENT_TRANSFER_COMPLETE);
}


void SPIInit(void) {

XMC_SPI_CH_Init(XMC_SPI0_CH1, &spi_config);

XMC_SPI_CH_SetWordLength(XMC_SPI0_CH1, 16);
//XMC_SPI_CH_SetFrameLength(XMC_SPI0_CH1, 63);

XMC_USIC_CH_EnableDelayCompensation(XMC_SPI0_CH1);

XMC_SPI_CH_SetInputSource(XMC_SPI0_CH1, XMC_SPI_CH_INPUT_DIN0, USIC0_C1_DX0_P2_2);
XMC_SPI_CH_SetBitOrderMsbFirst(XMC_SPI0_CH1);
XMC_SPI_CH_Start(XMC_SPI0_CH1);

/*GPIO configuration*/
XMC_GPIO_SetMode(SPI_MOSI, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2);
XMC_GPIO_SetMode(SPI_SCLK, XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT2);
XMC_GPIO_SetMode(SPI_MISO, XMC_GPIO_MODE_INPUT_TRISTATE);

XMC_DMA_Init(XMC_DMA0);
XMC_DMA_CH_Init(XMC_DMA0, 0, &dma_ch_recv_config);
XMC_DMA_CH_Init(XMC_DMA0, 1, &dma_ch_send_config);
XMC_DMA_CH_EnableEvent(XMC_DMA0, 0, XMC_DMA_CH_EVENT_TRANSFER_COMPLETE);

#ifdef FIFO_MODE
XMC_USIC_CH_TXFIFO_EnableEvent(XMC_SPI0_CH1, XMC_USIC_CH_TXFIFO_EVENT_CONF_STANDARD);
XMC_USIC_CH_TXFIFO_SetInterruptNodePointer(XMC_SPI0_CH1, XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD, 0);
XMC_USIC_CH_TXFIFO_Configure(XMC_SPI0_CH1, 32, XMC_USIC_CH_FIFO_SIZE_16WORDS, 7);
#else
XMC_SPI_CH_SelectInterruptNodePointer(XMC_SPI0_CH1, XMC_SPI_CH_INTERRUPT_NODE_POINTER_TRANSMIT_SHIFT , 0);
XMC_SPI_CH_EnableEvent(XMC_SPI0_CH1, XMC_SPI_CH_EVENT_TRANSMIT_SHIFT);
#endif

XMC_SPI_CH_SelectInterruptNodePointer(XMC_SPI0_CH1, XMC_SPI_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE, 1);
XMC_SPI_CH_SelectInterruptNodePointer(XMC_SPI0_CH1, XMC_SPI_CH_INTERRUPT_NODE_POINTER_RECEIVE, 1);
XMC_SPI_CH_EnableEvent(XMC_SPI0_CH1, XMC_SPI_CH_EVENT_STANDARD_RECEIVE | XMC_SPI_CH_EVENT_ALTERNATIVE_RECEIVE);

#ifdef FIFO_MODE
XMC_USIC_CH_RXFIFO_SetInterruptNodePointer(XMC_SPI0_CH1, XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD, 1);
XMC_USIC_CH_RXFIFO_EnableEvent(XMC_SPI0_CH1, XMC_USIC_CH_RXFIFO_EVENT_STANDARD);
XMC_USIC_CH_RXFIFO_Configure(XMC_SPI0_CH1, 32, XMC_USIC_CH_FIFO_SIZE_16WORDS, 0);
#endif

NVIC_SetPriority(GPDMA0_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 1));
NVIC_EnableIRQ(GPDMA0_0_IRQn);
} Show Less