XMC™ Forum Discussions
XMC™
Hello everyone,I got a strange communication issue between a master (XMC 4500) and more than one slave (XMC1201 + port expander card which communicate...
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Hello everyone,
I got a strange communication issue between a master (XMC 4500) and more than one slave (XMC1201 + port expander card which communicates via SPI).
On my board it's possible to plug in 2 different cards on the same SPI-port (every card gets an chip select and the master toggles between them).
When the master communicates with one slave (MCP23S17 -> port expander card), the waveform of the MISO looks like expected (image below).
The problem starts when the master communicates with both cards -> port expander card and an additional XMC1201 in slave mode (SPI003-app was used).
This looks like the slave is pulling up the MISO-line very strong and the MCP23S17 can't pull the line to ground when it gets the /CS. So the master thinks, due to the wrong voltage level, that the slave sends 0xFF instead of 0x00.
I'm not sure what I can do to prevent this behaviour. In a workaround I could configure the MISO-line to tristate when the end-of-message interrupt occures and reconfigure it at the start of the message (not really smart imho). This could prevent data corruption for other cards.
Thanks in advance for any help !
best regards
Sebastian Show Less
I got a strange communication issue between a master (XMC 4500) and more than one slave (XMC1201 + port expander card which communicates via SPI).
On my board it's possible to plug in 2 different cards on the same SPI-port (every card gets an chip select and the master toggles between them).
When the master communicates with one slave (MCP23S17 -> port expander card), the waveform of the MISO looks like expected (image below).
The problem starts when the master communicates with both cards -> port expander card and an additional XMC1201 in slave mode (SPI003-app was used).
This looks like the slave is pulling up the MISO-line very strong and the MCP23S17 can't pull the line to ground when it gets the /CS. So the master thinks, due to the wrong voltage level, that the slave sends 0xFF instead of 0x00.
I'm not sure what I can do to prevent this behaviour. In a workaround I could configure the MISO-line to tristate when the end-of-message interrupt occures and reconfigure it at the start of the message (not really smart imho). This could prevent data corruption for other cards.
Thanks in advance for any help !
best regards
Sebastian Show Less
XMC™
Hello.Just wanted to check if anyone else is seeing this problem.We have set up a Gateway node connecting 2 CANnets.Since the HW Gateway has it quirks...
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Hello.
Just wanted to check if anyone else is seeing this problem.
We have set up a Gateway node connecting 2 CANnets.
Since the HW Gateway has it quirks http://see https://www.infineonforums.com/threads/5360-Problems-with-FIFO-Gateway-on-XMCs-4400-Multican?, we opted for setting up 4 RX FIFOs and let the irq routines do the data shuffling.
This scheme works almost OK, but we are experiencing MSGLST from a MO in the RXFIFO even though the FIFO is not full.
The CAN_RXOF irq is enabled (and tested OK), but is not asserted in these MSGLST cases.
Fault rate is about 1-2 messages in about 40 millions, so the FIFOs wrapps around numerous times. We also have a FIFO highwater-mark monitor, and it shows that the FIFO is filled with max 2 unread messages at the time MSGLST is set.
FIFO sizes vary from 8 to 20 MOs.
Have also implemented a test command where the RX irq routine can skip n readouts, hence filling the FIFO, and that also works fine. Next irq that reads, empties the FIFO.
We are using the MSIMASK/MSID HW registers to find out which FIFO to read from.
In all the multiCAN examples we have come across, there is no examples on how to empty multiple RXFIFO using the MSIMASK/MSID HW registers.
Hoping someone can chime in on this one.
Here is our irq routine:
(Also opened a support case: Case:3740999) Show Less
Just wanted to check if anyone else is seeing this problem.
We have set up a Gateway node connecting 2 CANnets.
Since the HW Gateway has it quirks http://see https://www.infineonforums.com/threads/5360-Problems-with-FIFO-Gateway-on-XMCs-4400-Multican?, we opted for setting up 4 RX FIFOs and let the irq routines do the data shuffling.
This scheme works almost OK, but we are experiencing MSGLST from a MO in the RXFIFO even though the FIFO is not full.
The CAN_RXOF irq is enabled (and tested OK), but is not asserted in these MSGLST cases.
Fault rate is about 1-2 messages in about 40 millions, so the FIFOs wrapps around numerous times. We also have a FIFO highwater-mark monitor, and it shows that the FIFO is filled with max 2 unread messages at the time MSGLST is set.
FIFO sizes vary from 8 to 20 MOs.
Have also implemented a test command where the RX irq routine can skip n readouts, hence filling the FIFO, and that also works fine. Next irq that reads, empties the FIFO.
We are using the MSIMASK/MSID HW registers to find out which FIFO to read from.
In all the multiCAN examples we have come across, there is no examples on how to empty multiple RXFIFO using the MSIMASK/MSID HW registers.
Hoping someone can chime in on this one.
Here is our irq routine:
bool receive(CanMessage* msg)
{
uint32_t pendingIndex;
int i;
// printf("%s:\n", m_owner);
// printf("MSPND: %08x %08x\n", CAN->MSPND[1], CAN->MSPND[0]);
// printf("MSIMASK: %08x %08x\n", m_msimask[1], m_msimask[0]);
if (m_irqOwner != (uint32_t)(PPB->ICSR & PPB_ICSR_VECTACTIVE_Msk) - 16) {
Can *can = Can::getInstance();
can->s_wrongIRQ++;
return false;
}
for (i=0; i<2; i++) {
CAN->MSIMASK = m_msimask;
pendingIndex = CAN->MSID;
// printf("%-15s[%d] %d\n", "pendingIndex", i, pendingIndex);
if (pendingIndex == CAN_MSI_NO_PENDING) {
if (i == 1) {
return false;
}
else {
continue;
}
}
CLR_BIT(CAN->MSPND, pendingIndex);
pendingIndex += 32*i;
break;
}
// printf("%-15s %d\n", "pendingIndex", pendingIndex);
uint8_t baseIndex = m_messageObjects.front().getNumber();
XMC_CAN_MO_t* baseMoPtr = m_messageObjects.front().getMoPtr();
XMC_CAN_FIFO_SetSELMO(baseMoPtr, pendingIndex);
//printf("%-15s %d\n", "baseIndex", baseIndex);
return m_messageObjects[pendingIndex - baseIndex].receive(msg);
}
bool receive(CanMessage* msg)
{
uint32_t mo_message_lost = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_MSGLST_Msk) >> CAN_MO_MOSTAT_MSGLST_Pos;
checkAgain:
m_xmcCanMo.can_mo_ptr->MOCTR = CAN_MO_MOCTR_RESNEWDAT_Msk | CAN_MO_MOCTR_RESRXPND_Msk; // reset NEWDAT & RXPND
if ((((m_xmcCanMo.can_mo_ptr->MOAR) & CAN_MO_MOAR_IDE_Msk) >> CAN_MO_MOAR_IDE_Pos) == 1U) { // 29-bit ID
uint32_t identifier = (m_xmcCanMo.can_mo_ptr->MOAR & CAN_MO_MOAR_ID_Msk);
newCanMessage(msg, identifier & 0x000000ff);
msg->size = (uint8_t)((uint32_t)((m_xmcCanMo.can_mo_ptr->MOFCR) & CAN_MO_MOFCR_DLC_Msk) >> CAN_MO_MOFCR_DLC_Pos);
msg->identifier = identifier;
msg->nodeNum = (identifier & 0x0000ff00) >> 8;
uint32_t* dataPtr = reinterpret_cast(msg->data);
if (msg->size > 0) {
dataPtr[0] = m_xmcCanMo.can_mo_ptr->MODATAL;
}
if (msg->size > 4) {
dataPtr[1] = m_xmcCanMo.can_mo_ptr->MODATAH;
}
}
uint32_t mo_new_data_available = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_NEWDAT_Msk) >> CAN_MO_MOSTAT_NEWDAT_Pos;
uint32_t mo_recepcion_ongoing = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_RXUPD_Msk) >> CAN_MO_MOSTAT_RXUPD_Pos;
if ((mo_new_data_available) || (mo_recepcion_ongoing)) {
Can::s_checkedAgain++;
goto checkAgain;
}
if (mo_message_lost) {
m_xmcCanMo.can_mo_ptr->MOCTR = CAN_MO_MOCTR_RESMSGLST_Msk; // reset lost bit
if (Can::s_gatewayEnabled) {
if ((m_number>=CAN_RX12_MOSTART) && (m_number<=CAN_RX12_MOEND)) {
Can::s_lostCntr1++;
} else {
if ((m_number>=CAN_RX2_MOSTART) && (m_number<=CAN_RX2_MOEND)) {
Can::s_lostCntr2++;
}
}
} else {
if ((m_number>=CAN_RX_MOSTART) && (m_number<=CAN_RX_MOEND)) {
Can::s_lostCntr1++;
}
}
// panic_printf(PANIC_USER, "CAN MSG LOST, MO%02d, idle %d%%", m_number, getIdlePercent());
//// panic_printf(PANIC_USER, "LOST MO%02d %08x %08x", m_number, CAN->MSPND[1], CAN->MSPND[0]);
//// printf("\n\nLOST MO%02d %08x %08x\n\n", m_number, CAN->MSPND[1], CAN->MSPND[0]);
// return false;
}
// if (mo_recepcion_ongoing) {
// panic_printf(PANIC_USER, "CAN MSG RX BUSY, MO%02d", m_number);
// }
return true;
}
(Also opened a support case: Case:3740999) Show Less
XMC™
I'm newbie in ARM microcontrollers. But I successfully implement DMX-512 for driving leds (9-ch BCCU, UART etc) and it works fine.But I have pack of t...
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I'm newbie in ARM microcontrollers. But I successfully implement DMX-512 for driving leds (9-ch BCCU, UART etc) and it works fine.
But I have pack of troubles with implementing RDM (remote device management). Maybe anyone have example, how to implement it with XMC MCUs? Show Less
But I have pack of troubles with implementing RDM (remote device management). Maybe anyone have example, how to implement it with XMC MCUs? Show Less
XMC™
Hello,we built up a gateway with an XMC 4400 between Can Node 0 and 1.Gateway is in both directions, all messages from Node 0 to Node 1 and from Node ...
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Hello,
we built up a gateway with an XMC 4400 between Can Node 0 and 1.
Gateway is in both directions, all messages from Node 0 to Node 1 and from Node 1 to Node 0.
Therefor we have on RX MO on Node 0 and a TX FiFo with 30 MOs on Node 1.
Same the other way round.
Our Code:
Node 1 Rx MO:
/* Message 33 Configuration - Receive */
XMC_CAN_MO_Config(&message33_rx_n1);
XMC_CAN_GATEWAY_InitSourceObject(&message33_rx_n1,
( (XMC_CAN_GATEWAY_CONFIG_t) {
2,
31,
2,
true,
true,
true,
true
}));
Node 0 Transmit fifo
/*Message 2 Transmit*/
/*Base Objects*/
XMC_CAN_MO_Config(&message2_31_tx_gw_n0);
XMC_CAN_TXFIFO_ConfigMOBaseObject(&message2_31_tx_gw_n0,((XMC_CAN_FIFO_CONFIG_t){2,31,2}));
XMC_CAN_GATEWAY_InitDesObject(&message2_31_tx_gw_n0);
/*Slave Objects*/
for ( i = 3; i <= 31; i++ ) {
message2_31_tx_gw_n0.can_mo_ptr += ( CAN_MO3 - CAN_MO2);
XMC_CAN_MO_Config(&message2_31_tx_gw_n0);
XMC_CAN_TXFIFO_ConfigMOSlaveObject(&message2_31_tx_gw_n0,((XMC_CAN_FIFO_CONFIG_t){2,31,2}));
XMC_CAN_GATEWAY_InitDesObject(&message2_31_tx_gw_n0);
}
Gateway is working fine, if both can busses are okay.
BUT if we have a temorary disconnection on on bus, the Gatewas/FiFo is struggeling,
means messages are no more forwarded any more at once, but at different times.
Example:
On Node 0 we have periodig can message which are gatewayed to node 1.
Everything works.
Now we disconnect the Can bus on node 1, can bus on node 0 is still working.
After a while we reconnect can node 1 bus.
The effect is now, that some forwarded messages are not forwarded directly,
but later up to 2 seconds.
That does mean that the ordering of the messages is different on Node 1 than on Node 0.
This is terrible for our application.
We tried to reset the messagecounters for the Fifo, TX request flags, and any other
flag without any final result.
Does anyone have an Idea what to do ?
Regards Show Less
we built up a gateway with an XMC 4400 between Can Node 0 and 1.
Gateway is in both directions, all messages from Node 0 to Node 1 and from Node 1 to Node 0.
Therefor we have on RX MO on Node 0 and a TX FiFo with 30 MOs on Node 1.
Same the other way round.
Our Code:
Node 1 Rx MO:
/* Message 33 Configuration - Receive */
XMC_CAN_MO_Config(&message33_rx_n1);
XMC_CAN_GATEWAY_InitSourceObject(&message33_rx_n1,
( (XMC_CAN_GATEWAY_CONFIG_t) {
2,
31,
2,
true,
true,
true,
true
}));
Node 0 Transmit fifo
/*Message 2 Transmit*/
/*Base Objects*/
XMC_CAN_MO_Config(&message2_31_tx_gw_n0);
XMC_CAN_TXFIFO_ConfigMOBaseObject(&message2_31_tx_gw_n0,((XMC_CAN_FIFO_CONFIG_t){2,31,2}));
XMC_CAN_GATEWAY_InitDesObject(&message2_31_tx_gw_n0);
/*Slave Objects*/
for ( i = 3; i <= 31; i++ ) {
message2_31_tx_gw_n0.can_mo_ptr += ( CAN_MO3 - CAN_MO2);
XMC_CAN_MO_Config(&message2_31_tx_gw_n0);
XMC_CAN_TXFIFO_ConfigMOSlaveObject(&message2_31_tx_gw_n0,((XMC_CAN_FIFO_CONFIG_t){2,31,2}));
XMC_CAN_GATEWAY_InitDesObject(&message2_31_tx_gw_n0);
}
Gateway is working fine, if both can busses are okay.
BUT if we have a temorary disconnection on on bus, the Gatewas/FiFo is struggeling,
means messages are no more forwarded any more at once, but at different times.
Example:
On Node 0 we have periodig can message which are gatewayed to node 1.
Everything works.
Now we disconnect the Can bus on node 1, can bus on node 0 is still working.
After a while we reconnect can node 1 bus.
The effect is now, that some forwarded messages are not forwarded directly,
but later up to 2 seconds.
That does mean that the ordering of the messages is different on Node 1 than on Node 0.
This is terrible for our application.
We tried to reset the messagecounters for the Fifo, TX request flags, and any other
flag without any final result.
Does anyone have an Idea what to do ?
Regards Show Less
XMC™
Hi, I am working on XMC1100, While Sending Data Through the Terminal to xmc1100. Data Lost was happening. and the buffer full flag is enabled.The UA...
Show More
Hi,
I am working on XMC1100, While Sending Data Through the Terminal to xmc1100. Data Lost was happening. and the buffer full flag is enabled.
The UART Cofiguration as below
baudrate = 921600.
Rx = pin 1.1
Tx = pin 1.0
channel = U0C0
what might be the issue.
Thanks and Regards,
Harshan. Show Less
I am working on XMC1100, While Sending Data Through the Terminal to xmc1100. Data Lost was happening. and the buffer full flag is enabled.
The UART Cofiguration as below
baudrate = 921600.
Rx = pin 1.1
Tx = pin 1.0
channel = U0C0
what might be the issue.
Thanks and Regards,
Harshan. Show Less
XMC™
I observed some strange behaviour of an XMC4800 that I cannot understand:My situation:PWM-ISR (16kHz):- Read ADC results- Trigger new ADC ConversionsI...
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I observed some strange behaviour of an XMC4800 that I cannot understand:
My situation:
PWM-ISR (16kHz):
- Read ADC results
- Trigger new ADC Conversions
Init-Function():
- enable 'ADC-Conversion finished ISRs' (very short, contain only 1 statement to capture a Timer Value)
- Loop (active for several 100ms): wait for next PWM-ISR, process ADC result provided by PWM-ISR
- disable 'ADC-Conversion finished ISRs'
PWM-ISR continues.
So far everything is ok.
Except for this:
During the Loop of Init-Function() the ADC results are increased by some ADC-Increments.
They drop after Init-Function() is finished.
If I do not activate the 'ADC-Conversion finished ISRs' during the Init-Loop, the ADC values are more or less the same afterwards...
Any ideas ? Show Less
My situation:
PWM-ISR (16kHz):
- Read ADC results
- Trigger new ADC Conversions
Init-Function():
- enable 'ADC-Conversion finished ISRs' (very short, contain only 1 statement to capture a Timer Value)
- Loop (active for several 100ms): wait for next PWM-ISR, process ADC result provided by PWM-ISR
- disable 'ADC-Conversion finished ISRs'
PWM-ISR continues.
So far everything is ok.
Except for this:
During the Loop of Init-Function() the ADC results are increased by some ADC-Increments.
They drop after Init-Function() is finished.
If I do not activate the 'ADC-Conversion finished ISRs' during the Init-Loop, the ADC values are more or less the same afterwards...
Any ideas ? Show Less
XMC™
Hello,I would like to demodulate a Biphase Mark encoded signal with an XMC1100.The signal has a constant frequency of 2kHz. The binary value 1 is disp...
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Hello,
I would like to demodulate a Biphase Mark encoded signal with an XMC1100.
The signal has a constant frequency of 2kHz. The binary value 1 is displayed as a transision within a period. The binary value 0 is displayed as full period.
my approach would be to define two events with CCU4_Slice_Config app -> capture. the first Event_0 started a timer when a rising edge occurred and Event_1 ends the timer.
The only problem is that the timer should be started again at the falling edge at the same time.
How can you realize something like that? can someone help me Show Less
I would like to demodulate a Biphase Mark encoded signal with an XMC1100.
The signal has a constant frequency of 2kHz. The binary value 1 is displayed as a transision within a period. The binary value 0 is displayed as full period.
my approach would be to define two events with CCU4_Slice_Config app -> capture. the first Event_0 started a timer when a rising edge occurred and Event_1 ends the timer.
The only problem is that the timer should be started again at the falling edge at the same time.
How can you realize something like that? can someone help me Show Less
XMC™
I bought a 3D Magnetic Sensor 2Go board. How could I get the source code of the built-in firmware. The downloaded GUI tool only has the binary for dem...
Show More
I bought a 3D Magnetic Sensor 2Go board. How could I get the source code of the built-in firmware. The downloaded GUI tool only has the binary for demonstration. But I would like to study the source code to get familiar with the sensor TLV493D. Thank you.
Click to go to The Kit page Show Less
Click to go to The Kit page Show Less
XMC™
I'd like to generate an IRQ by a falling edge on RTC_XTAL1. For this I can use ERU0, 1B1.Can someone tell me how to configurate the MCU for this purpo...
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I'd like to generate an IRQ by a falling edge on RTC_XTAL1. For this I can use ERU0, 1B1.
Can someone tell me how to configurate the MCU for this purpose?
Im using an XMC4800F144. Show Less
Can someone tell me how to configurate the MCU for this purpose?
Im using an XMC4800F144. Show Less
XMC™
Hallo ,to controle a dual active bridge, i need 8 PWM signals , as you can see in the picture below,every two MOSFET blong to a group from A to D. HS...
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Hallo ,
to controle a dual active bridge, i need 8 PWM signals , as you can see in the picture below,every two MOSFET blong to a group from A to D. HSX (high side) and LSX (low side)
need a dead time between the transitions, plus the secondary bridge ( C and D) need to be phase shifted. I'm wondering if mixing CCU80 and CCU81
(A -----> CCU80.out20/CCU80.out21, B -----> CCU81.out00/CCU81.out01, C -----> CCU80.out30/CCU80.out31 and D -----> CCU81.out20/CCU81.out21)
will create a communication problems and Deficiency in generating the PWM signals.
Best regards,
Fethi
Show Less
to controle a dual active bridge, i need 8 PWM signals , as you can see in the picture below,every two MOSFET blong to a group from A to D. HSX (high side) and LSX (low side)
need a dead time between the transitions, plus the secondary bridge ( C and D) need to be phase shifted. I'm wondering if mixing CCU80 and CCU81
(A -----> CCU80.out20/CCU80.out21, B -----> CCU81.out00/CCU81.out01, C -----> CCU80.out30/CCU80.out31 and D -----> CCU81.out20/CCU81.out21)
will create a communication problems and Deficiency in generating the PWM signals.
Best regards,
Fethi
Show Less