XMC™ Forum Discussions
XMC™
I downloaded the XMCLib using the following link:http://dave.infineon.com/Libraries/XMCLib/XMC_Peripheral_Library_v2.1.16.zipBut the version within DA...
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I downloaded the XMCLib using the following link:
http://dave.infineon.com/Libraries/XMCLib/XMC_Peripheral_Library_v2.1.16.zip
But the version within DAVE is 2.1.20.
Where can I find latest version of the XMCLib ? Show Less
http://dave.infineon.com/Libraries/XMCLib/XMC_Peripheral_Library_v2.1.16.zip
But the version within DAVE is 2.1.20.
Where can I find latest version of the XMCLib ? Show Less
XMC™
Hello All, from India. I'm new to this forum and happy to join this community. So, This forum is designed to enable mechatronic motor control solution...
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Hello All, from India. I'm new to this forum and happy to join this community. So, This forum is designed to enable mechatronic motor control solutions for a range of motor control applications, where a small package form factor and a minimum number of external components are essential. Looking forward to this group.
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XMC™
Hello,For system initialization, I have a need to communicate with some chips on my board using the XMC1300 as an I2C master for configuration. After ...
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Hello,
For system initialization, I have a need to communicate with some chips on my board using the XMC1300 as an I2C master for configuration. After the initial communication, I want to switch the I2C master
on the channel to ASC to send out debug information. The second channel is already used so unavailable for that purpose. Unfortunately, I can find no examples to perform this switch and my attempts
have not been successful to date. I have pulled down the old DAVE 3.10 and the latest DAVE IDE but none seems to have code for initializing the channel. In several points in the reference manual, there
are comments regarding switching protocols and I have tried to follow these along with the code that does exist used to uninitialize the I2CSlave.
This is what I have so far for uninitialization:
USIC0_CH0->KSCFG |= (((uint32_t)SHIFT_THREE << USIC_CH_KSCFG_NOMCFG_Pos) & USIC_CH_KSCFG_NOMCFG_Msk);
USIC0_CH0->CCR = 0x00000000U;
USIC0_CH0->KSCFG = 0x00000002U;
USIC0_CH0->FDR = 0x00000000U;
USIC0_CH0->BRG = 0x00000000U;
USIC0_CH0->SCTR = 0x00000000U;
USIC0_CH0->TCSR = 0x00000000U;
USIC0_CH0->PCR_IICMode = 0x00000000U;
USIC0_CH0->PSR_IICMode = 0x00000000U;
USIC0_CH0->TBCTR = 0x00000000U;
USIC0_CH0->RBCTR = 0x00000000U;
USIC0_CH0->PSCR = 0x0001FFFFFU;
USIC0_CH0->TRBSCR = 0x0000C0707;
NVIC_DisableIRQ( USIC0_0_IRQn );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_MTDV_Msk, USIC_CH_FMR_MTDV_Pos, 2 );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_CRDV0_Msk, USIC_CH_FMR_CRDV0_Pos, 1 );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_CRDV1_Msk, USIC_CH_FMR_CRDV1_Pos, 1 );
I would also like to see code for ASC reset if possible.
Jason Show Less
For system initialization, I have a need to communicate with some chips on my board using the XMC1300 as an I2C master for configuration. After the initial communication, I want to switch the I2C master
on the channel to ASC to send out debug information. The second channel is already used so unavailable for that purpose. Unfortunately, I can find no examples to perform this switch and my attempts
have not been successful to date. I have pulled down the old DAVE 3.10 and the latest DAVE IDE but none seems to have code for initializing the channel. In several points in the reference manual, there
are comments regarding switching protocols and I have tried to follow these along with the code that does exist used to uninitialize the I2CSlave.
This is what I have so far for uninitialization:
USIC0_CH0->KSCFG |= (((uint32_t)SHIFT_THREE << USIC_CH_KSCFG_NOMCFG_Pos) & USIC_CH_KSCFG_NOMCFG_Msk);
USIC0_CH0->CCR = 0x00000000U;
USIC0_CH0->KSCFG = 0x00000002U;
USIC0_CH0->FDR = 0x00000000U;
USIC0_CH0->BRG = 0x00000000U;
USIC0_CH0->SCTR = 0x00000000U;
USIC0_CH0->TCSR = 0x00000000U;
USIC0_CH0->PCR_IICMode = 0x00000000U;
USIC0_CH0->PSR_IICMode = 0x00000000U;
USIC0_CH0->TBCTR = 0x00000000U;
USIC0_CH0->RBCTR = 0x00000000U;
USIC0_CH0->PSCR = 0x0001FFFFFU;
USIC0_CH0->TRBSCR = 0x0000C0707;
NVIC_DisableIRQ( USIC0_0_IRQn );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_MTDV_Msk, USIC_CH_FMR_MTDV_Pos, 2 );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_CRDV0_Msk, USIC_CH_FMR_CRDV0_Pos, 1 );
WR_REG( USIC0_CH0->FMR, USIC_CH_FMR_CRDV1_Msk, USIC_CH_FMR_CRDV1_Pos, 1 );
I would also like to see code for ASC reset if possible.
Jason Show Less
XMC™
Hi,I have been getting the occasional Alarm Status 0x002C: Fatal Sync Error occur from my EtherCAT master. My project is based on the ETHCAT_SSC_AUT_...
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Hi,
I have been getting the occasional Alarm Status 0x002C: Fatal Sync Error occur from my EtherCAT master. My project is based on the ETHCAT_SSC_AUT_BASE_XMC48 example project. I have distributed clocks enabled with a PDO period of 1ms. I'm using Slave Stack Code 5.12.
I have put an oscilloscope on to monitor the Sync0 SYNC0IRQHandler function and the EtherCAT ecat_ssc_timer_handler function. The ecat_ssc_timer_handler function is slowly drifting and occasionally crosses the SYNC0IRQHandler function.
The SYNC0IRQHandler has an interrupt priority of 30
ecat_ssc_timer_handler has an interrupt priority of 63
I think I have tracked down the problem to the SYNC0IRQHandler occasionally preempting the ecat_ssc_timer_handler when it is in the middle of incrementing Sync0WdCounter (ecatslv.c, DC_CheckWatchdog(), line 2163). If this is the case then the old value will be incremented and the reset of the value in SYNC0IRQHandler (ecatappl.c, Sync0_Isr(), line 576) will be missed. i.e. the old value of 1 will continue to be incremented to 2. If the ecat_ssc_timer_handler DC_CheckWatchdog() function then manages to check the Sync0WdCounter value on the next cycle before being interrupted it will raise a watchdog error resulting in the Fatal Sync Error.
To work around this problem I have:
Giving the ECAT_INTERRUPT_0 object (which calls ecat_ssc_timer_handler) the same priority as the INT_SYNC0 object (which calls SYNC0IRQHandler) will effectively serialize the two handlers, but the sub-priorities will give INT_SYNC0 and INT_SYNC1 order preference.
Regards,
Graeme. Show Less
I have been getting the occasional Alarm Status 0x002C: Fatal Sync Error occur from my EtherCAT master. My project is based on the ETHCAT_SSC_AUT_BASE_XMC48 example project. I have distributed clocks enabled with a PDO period of 1ms. I'm using Slave Stack Code 5.12.
I have put an oscilloscope on to monitor the Sync0 SYNC0IRQHandler function and the EtherCAT ecat_ssc_timer_handler function. The ecat_ssc_timer_handler function is slowly drifting and occasionally crosses the SYNC0IRQHandler function.
The SYNC0IRQHandler has an interrupt priority of 30
ecat_ssc_timer_handler has an interrupt priority of 63
I think I have tracked down the problem to the SYNC0IRQHandler occasionally preempting the ecat_ssc_timer_handler when it is in the middle of incrementing Sync0WdCounter (ecatslv.c, DC_CheckWatchdog(), line 2163). If this is the case then the old value will be incremented and the reset of the value in SYNC0IRQHandler (ecatappl.c, Sync0_Isr(), line 576) will be missed. i.e. the old value of 1 will continue to be incremented to 2. If the ecat_ssc_timer_handler DC_CheckWatchdog() function then manages to check the Sync0WdCounter value on the next cycle before being interrupted it will raise a watchdog error resulting in the Fatal Sync Error.
To work around this problem I have:
- updated the CPU_CTRL_XMC4_0 "Number of priority bits for priority grouping" value to: 4
- modified the interrupt priorities to:INT_SYNC0, priority: 10, sub-priority: 0
INT_SYNC1, priority: 10, sub-priority: 1
ECAT_INTERRUPT_0, priority: 10, sub-priority: 2
Giving the ECAT_INTERRUPT_0 object (which calls ecat_ssc_timer_handler) the same priority as the INT_SYNC0 object (which calls SYNC0IRQHandler) will effectively serialize the two handlers, but the sub-priorities will give INT_SYNC0 and INT_SYNC1 order preference.
Regards,
Graeme. Show Less
XMC™
Hello,I am using usb on xmc in winusb mode. For this, I need to install winusb driver which can be found in DAVE-4.4.2\D_LibraryStore_4.4\resources\4....
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Hello,
I am using usb on xmc in winusb mode. For this, I need to install winusb driver which can be found in
DAVE-4.4.2\D_LibraryStore_4.4\resources\4.0.10\app\USBD_WINUSB\0\Templates\inf\
this driver is signed by Infineon with certificate valid from 2012 to 2015.
On Windows 10 I am unable to install this driver by bundling it with other software and using automatic install program. Can you please provide driver with updated certificate? Can you recommend a solution.
Kind regards
rum Show Less
I am using usb on xmc in winusb mode. For this, I need to install winusb driver which can be found in
DAVE-4.4.2\D_LibraryStore_4.4\resources\4.0.10\app\USBD_WINUSB\0\Templates\inf\
this driver is signed by Infineon with certificate valid from 2012 to 2015.
On Windows 10 I am unable to install this driver by bundling it with other software and using automatic install program. Can you please provide driver with updated certificate? Can you recommend a solution.
Kind regards
rum Show Less
XMC™
Hi,I have the XMC4800 Automation Board V2. My project is using both the EtherCAT and Ethernet components of the board. The Ethernet side is being co...
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Hi,
I have the XMC4800 Automation Board V2. My project is using both the EtherCAT and Ethernet components of the board. The Ethernet side is being connected to a thirdparty marking head controller.
I have found that the only way I can get the XMC4800 board to successfully communicate with the marking head is to set up a tap on the XMC4800 transmit wires (Orange, White/Orange) of the ethernet cable and plug the tap cable into a computer or switch. The switch doesn't even need to powered on (but the computer does). I found this out by getting my system working while monitoring the transmit wires via wireshark, but when monitoring the receive wires or not having the tap plugged in it did not work.
The marking head controller has its network socket connected to a Wurth Elektronik WE 749010012A Lan transformer and a Texas Instruments DP83849C Ethernet Phy (dual phy chip) and then an FPGA.
I am configuring the XMC_ETH settings to disable auto negotiation as the marking head also does not communicate if auto negotiation is enabled, even though XMC_ETH_PHY_IsAutonegotiationCompleted() returns and XMC_ETH_PHY_GetLinkSpeed() and XMC_ETH_PHY_GetLinkDuplex() reports the correct values (XMC_ETH_LINK_SPEED_100M and XMC_ETH_LINK_DUPLEX_FULL).
I was wondering if I need to bridge the transmit wires (Orange, White/Orange) with a capacitor, or something?
This is my configuration:
Regards,
Graeme Show Less
I have the XMC4800 Automation Board V2. My project is using both the EtherCAT and Ethernet components of the board. The Ethernet side is being connected to a thirdparty marking head controller.
I have found that the only way I can get the XMC4800 board to successfully communicate with the marking head is to set up a tap on the XMC4800 transmit wires (Orange, White/Orange) of the ethernet cable and plug the tap cable into a computer or switch. The switch doesn't even need to powered on (but the computer does). I found this out by getting my system working while monitoring the transmit wires via wireshark, but when monitoring the receive wires or not having the tap plugged in it did not work.
The marking head controller has its network socket connected to a Wurth Elektronik WE 749010012A Lan transformer and a Texas Instruments DP83849C Ethernet Phy (dual phy chip) and then an FPGA.
I am configuring the XMC_ETH settings to disable auto negotiation as the marking head also does not communicate if auto negotiation is enabled, even though XMC_ETH_PHY_IsAutonegotiationCompleted() returns and XMC_ETH_PHY_GetLinkSpeed() and XMC_ETH_PHY_GetLinkDuplex() reports the correct values (XMC_ETH_LINK_SPEED_100M and XMC_ETH_LINK_DUPLEX_FULL).
I was wondering if I need to bridge the transmit wires (Orange, White/Orange) with a capacitor, or something?
This is my configuration:
#define ETH_PHY_ADDR 0
#define ETH_RXD1 P14_9
#define ETH_RXD0 P14_8
#define ETH_RXER P0_11
#define ETH_CLK_RMII P15_8
#define ETH_TX_EN P5_9
#define ETH_TXD1 P2_13
#define ETH_TXD0 P2_12
#define ETH_CRS_DV P15_9
#define ETH_MDIO P1_11
#define ETH_MDC P1_10
/* MAC ADDRESS:
* Note: REAJet Controller seems to have a fixed MAC address of: 00:0e:f9:00:5c:fd
* (the slave seems to have a fixed MAC address of: 00:0e:f9:00:5c:fe) */
#define MAC_ADDR0 0x00
#define MAC_ADDR1 0x0e
#define MAC_ADDR2 0xf9
#define MAC_ADDR3 0x00
#define MAC_ADDR4 0x5c
#define MAC_ADDR5 0xfd
#define MAC_ADDR ((uint64_t)MAC_ADDR0 | \
((uint64_t)MAC_ADDR1 << 😎 | \
((uint64_t)MAC_ADDR2 << 16) | \
((uint64_t)MAC_ADDR3 << 24) | \
((uint64_t)MAC_ADDR4 << 32) | \
((uint64_t)MAC_ADDR5 << 40))
static XMC_ETH_PHY_CONFIG_t eth_phy_config =
{
.interface = XMC_ETH_LINK_INTERFACE_RMII,
.speed = XMC_ETH_LINK_SPEED_100M,
.duplex = XMC_ETH_LINK_DUPLEX_FULL,
.enable_auto_negotiate = false,
.enable_loop_back = false
};
static XMC_ETH_MAC_t eth_mac =
{
.regs = ETH0,
.address = MAC_ADDR,
.rx_desc = rx_desc,
.tx_desc = tx_desc,
.rx_buf = &rx_buf[0][0],
.tx_buf = &tx_buf[0][0],
.num_rx_buf = XMC_ETH_MAC_NUM_RX_BUF,
.num_tx_buf = XMC_ETH_MAC_NUM_TX_BUF
};
// init the eth MAC and PHY
XMC_ETH_MAC_PORT_CTRL_t port_control;
XMC_GPIO_CONFIG_t gpio_config;
gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RXD0, &gpio_config);
XMC_GPIO_Init(ETH_RXD1, &gpio_config);
XMC_GPIO_Init(ETH_CLK_RMII, &gpio_config);
XMC_GPIO_Init(ETH_CRS_DV, &gpio_config);
XMC_GPIO_Init(ETH_RXER, &gpio_config);
XMC_GPIO_Init(ETH_MDIO, &gpio_config);
port_control.mode = XMC_ETH_MAC_PORT_CTRL_MODE_RMII;
port_control.rxd0 = XMC_ETH_MAC_PORT_CTRL_RXD0_P14_8;
port_control.rxd1 = XMC_ETH_MAC_PORT_CTRL_RXD1_P14_9;
port_control.clk_rmii = XMC_ETH_MAC_PORT_CTRL_CLK_RMII_P15_8;
port_control.crs_dv = XMC_ETH_MAC_PORT_CTRL_CRS_DV_P15_9;
port_control.rxer = XMC_ETH_MAC_PORT_CTRL_RXER_P0_11;
port_control.mdio = XMC_ETH_MAC_PORT_CTRL_MDIO_P1_11;
XMC_ETH_MAC_SetPortControl(ð_mac, port_control);
XMC_ETH_MAC_Init(ð_mac);
XMC_ETH_MAC_DisableJumboFrame(ð_mac);
gpio_config.output_level = XMC_GPIO_OUTPUT_LEVEL_LOW;
gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P2_12_AF_ETH0_TXD0);
XMC_GPIO_Init(ETH_TXD0, &gpio_config);
gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P2_13_AF_ETH0_TXD1);
XMC_GPIO_Init(ETH_TXD1, &gpio_config);
gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P5_9_AF_ETH0_TX_EN);
XMC_GPIO_Init(ETH_TX_EN, &gpio_config);
gpio_config.mode = (XMC_GPIO_MODE_t)((uint32_t)XMC_GPIO_MODE_OUTPUT_PUSH_PULL | P1_10_AF_ETH0_MDC);
XMC_GPIO_Init(ETH_MDC, &gpio_config);
XMC_GPIO_SetHardwareControl(ETH_MDIO, P1_11_HWCTRL_ETH0_MDO);
while (XMC_ETH_PHY_GetLinkStatus(ð_mac, ETH_PHY_ADDR) != XMC_ETH_LINK_STATUS_UP)
{
// wait
}
// Note: Auto negotiation is off, we have a fixed speed of 100BaseT and Full duplex
XMC_ETH_LINK_SPEED_t speed = XMC_ETH_LINK_SPEED_100M;
XMC_ETH_LINK_DUPLEX_t duplex = XMC_ETH_LINK_DUPLEX_FULL;
XMC_ETH_MAC_SetLink(ð_mac, speed, duplex);
// Enable ethernet interrupts
XMC_ETH_MAC_EnableEvent(ð_mac, XMC_ETH_MAC_EVENT_RECEIVE);
NVIC_SetPriority(ETH0_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
NVIC_ClearPendingIRQ(ETH0_0_IRQn);
NVIC_EnableIRQ(ETH0_0_IRQn);
XMC_ETH_MAC_EnableTx(ð_mac);
XMC_ETH_MAC_EnableRx(ð_mac);
Regards,
Graeme Show Less
XMC™
Hello All,I want to use square root api provided with math library : int16_t XMC_MATH_CORDIC_Q15_Sqrt(int16_t x) and ...
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Hello All,
I want to use square root api provided with math library :
int16_t XMC_MATH_CORDIC_Q15_Sqrt(int16_t x) and
int32_t XMC_MATH_CORDIC_Q31_Sqrt(int32_t x)
But I am not getting the desired results.
Is there any changes has to be made for getting the result, like some sort of number format?
Suppose I want to find the square root of 144 and 34567. what steps I have to follow to get the desired result?
Argument x has to be converted in which data format and result will be in which format?
Please guide me!
Regards,
Tinchu Show Less
I want to use square root api provided with math library :
int16_t XMC_MATH_CORDIC_Q15_Sqrt(int16_t x) and
int32_t XMC_MATH_CORDIC_Q31_Sqrt(int32_t x)
But I am not getting the desired results.
Is there any changes has to be made for getting the result, like some sort of number format?
Suppose I want to find the square root of 144 and 34567. what steps I have to follow to get the desired result?
Argument x has to be converted in which data format and result will be in which format?
Please guide me!
Regards,
Tinchu Show Less
XMC™
Hi, Every RF expertsCan somebody guide me how to design following RF frontend PCB which is mentioned in the Distance2Go Demo board documentation?<>TX ...
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Hi, Every RF experts
Can somebody guide me how to design following RF frontend PCB which is mentioned in the Distance2Go Demo board documentation?
<>
TX direction: Matching Structures + Wilkinson Combiner + 2nd Harmonic Filter + DC Blocks + Fan-shaped Stub
RX direction: Matching Structures + DC Blocks + Fan-shaped Stub
From the Distance2Go Demo board user manual there have only mentioned how to design the TX/RX Matching Structures.
I am a fresh for RF circuit PCB design. Really wondering these kind of drawing on the demo board.
Thanks for your help in advance
Song Xiao
Show Less
Can somebody guide me how to design following RF frontend PCB which is mentioned in the Distance2Go Demo board documentation?
<
TX direction: Matching Structures + Wilkinson Combiner + 2nd Harmonic Filter + DC Blocks + Fan-shaped Stub
RX direction: Matching Structures + DC Blocks + Fan-shaped Stub
From the Distance2Go Demo board user manual there have only mentioned how to design the TX/RX Matching Structures.
I am a fresh for RF circuit PCB design. Really wondering these kind of drawing on the demo board.
Thanks for your help in advance
Song Xiao
XMC™
Hi,I'm designing up a label for the box we are putting the XMC4800 Automation Board V2 in. I was wondering what standards it complies with.e.g.:- RoH...
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Hi,
I'm designing up a label for the box we are putting the XMC4800 Automation Board V2 in. I was wondering what standards it complies with.
e.g.:
- RoHS
- CE
- UL
Other?
Regards,
Graeme. Show Less
I'm designing up a label for the box we are putting the XMC4800 Automation Board V2 in. I was wondering what standards it complies with.
e.g.:
- RoHS
- CE
- UL
Other?
Regards,
Graeme. Show Less
XMC™
Hi,in my project using an XMC1100 with DAVE Apps I trigger ADC_MEASUREMENT by an PWM_CCU4on Period match as well as Compare match while counting up. A...
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Hi,
in my project using an XMC1100 with DAVE Apps I trigger ADC_MEASUREMENT by an PWM_CCU4
on Period match as well as Compare match while counting up.
An interrupt handler for ADC_MEASUREMENT then evaluates the results.
Since I switch a power MOSFET with the PWM output signal my measurements have rather different meanings
whether PWM is in active vs. inactive phase. How can I determine in which phase the PWM_CCU4 is currently?
PWM frequency is low (sub 1kHz). Thus PWM state will not have changed from the one it had during the ADC
did its measurements.
By the way, PWM_CCU4 will not signal Compare match while counting up when Duty Cycle is set to 0.0%, right?
Markus Show Less
in my project using an XMC1100 with DAVE Apps I trigger ADC_MEASUREMENT by an PWM_CCU4
on Period match as well as Compare match while counting up.
An interrupt handler for ADC_MEASUREMENT then evaluates the results.
Since I switch a power MOSFET with the PWM output signal my measurements have rather different meanings
whether PWM is in active vs. inactive phase. How can I determine in which phase the PWM_CCU4 is currently?
PWM frequency is low (sub 1kHz). Thus PWM state will not have changed from the one it had during the ADC
did its measurements.
By the way, PWM_CCU4 will not signal Compare match while counting up when Duty Cycle is set to 0.0%, right?
Markus Show Less