XMC™ Forum Discussions
XMC™
Hi all,hopefully someone can help me with a DAVE related problem:I have to use source and header files which are not directly located in the project d...
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Hi all,
hopefully someone can help me with a DAVE related problem:
I have to use source and header files which are not directly located in the project directory itself but somewhere else. This is because the code is shared with some other microcontrollers which implement exactly the same algorithm. At the end of the development we want to use an automatic build process.
As revision control we use SVN.
Now the question: In DAVE Eclipse IDE I have the possibility to use a so-called Linked Folder where I can specify the directory in my filesystem. The problem is that this is an absolute path: C:home/sebastian/.......
If someone of my colleagues checks out the repository then of course the above path is not correct any more. I need DAVE to use relative paths in order to meet my target.
Thank you for helping!
Kind regards
Sebastian Show Less
hopefully someone can help me with a DAVE related problem:
I have to use source and header files which are not directly located in the project directory itself but somewhere else. This is because the code is shared with some other microcontrollers which implement exactly the same algorithm. At the end of the development we want to use an automatic build process.
As revision control we use SVN.
Now the question: In DAVE Eclipse IDE I have the possibility to use a so-called Linked Folder where I can specify the directory in my filesystem. The problem is that this is an absolute path: C:home/sebastian/.......
If someone of my colleagues checks out the repository then of course the above path is not correct any more. I need DAVE to use relative paths in order to meet my target.
Thank you for helping!
Kind regards
Sebastian Show Less
XMC™
Hello forum,we plan to integrate the flash read protection feature into our product using a XMC4300. I'd like to make sure my plans are correct before...
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Hello forum,
we plan to integrate the flash read protection feature into our product using a XMC4300. I'd like to make sure my plans are correct before start.
We use a bootloader (placed in first 16 kB of flash), which receives the firmware (on UART). The bootloader will install the global read protection on-demand (by a command). For application firmware update, it will use the "Disable Read Protection" (see table 8-4 in XMC4300 manual) flash command before update and the "Resume Protection" (table 8-4) command after successful update.
To be able to exchange the bootloader itself (e.g. by JTAG-interfaced J-Flash), I need to remove the read protection permanently by erasing UCB.
1) I understood that installing the read protection requires writing the User Control Block (UCB) for user 0. It is only possible to write to that UCB 4 times, even if I only access user 0? (User 0 contains the global read protect bit.)
2) Does disabling the read protection automatically erase the full chip or do I need to make that happen manually?
3) When I'd like to attach JTAG again, will a temporarily disabled read protection (by "Disable Read Protection" command) work? I assume the JTAG connect command will perform a controller reset, which will re-enable the read protection again, will it?
4) Does the enabled read protection affect the ability to read flash in my bootloader itself?
Best regards,
Ernie T. Show Less
we plan to integrate the flash read protection feature into our product using a XMC4300. I'd like to make sure my plans are correct before start.
We use a bootloader (placed in first 16 kB of flash), which receives the firmware (on UART). The bootloader will install the global read protection on-demand (by a command). For application firmware update, it will use the "Disable Read Protection" (see table 8-4 in XMC4300 manual) flash command before update and the "Resume Protection" (table 8-4) command after successful update.
To be able to exchange the bootloader itself (e.g. by JTAG-interfaced J-Flash), I need to remove the read protection permanently by erasing UCB.
1) I understood that installing the read protection requires writing the User Control Block (UCB) for user 0. It is only possible to write to that UCB 4 times, even if I only access user 0? (User 0 contains the global read protect bit.)
2) Does disabling the read protection automatically erase the full chip or do I need to make that happen manually?
3) When I'd like to attach JTAG again, will a temporarily disabled read protection (by "Disable Read Protection" command) work? I assume the JTAG connect command will perform a controller reset, which will re-enable the read protection again, will it?
4) Does the enabled read protection affect the ability to read flash in my bootloader itself?
Best regards,
Ernie T. Show Less
XMC™
HelloI use 3 concatenated slices of CC40. I need to get the time stamps of 48bit counter periodically.Of course I can read time value of each slices b...
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Hello
I use 3 concatenated slices of CC40. I need to get the time stamps of 48bit counter periodically.
Of course I can read time value of each slices but if at this time one of the counters overflows i'll get a wrong timestamp.
Now i use timers in compare mode, if I'm not mistaken in capture mode i can to store at the moment time values of each timer(and then read this timestamp), but event connects to defined pin, and in my case i need to get timestamps via application.
Could you help me? Show Less
I use 3 concatenated slices of CC40. I need to get the time stamps of 48bit counter periodically.
Of course I can read time value of each slices but if at this time one of the counters overflows i'll get a wrong timestamp.
Now i use timers in compare mode, if I'm not mistaken in capture mode i can to store at the moment time values of each timer(and then read this timestamp), but event connects to defined pin, and in my case i need to get timestamps via application.
Could you help me? Show Less
XMC™
Hallo Everyone!Attached a sample project where I have the VADC and DMA running together using the DAVE 4.4.2 CE appsI am using 2X VADC groups, each wi...
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Hallo Everyone!
Attached a sample project where I have the VADC and DMA running together using the DAVE 4.4.2 CE apps
I am using 2X VADC groups, each with 3 inputs, sampling in continuous mode
With 2X DMA channels running (one for each VADC group), transferring the result registers to RAM
DMA transfers are triggered on the VADC result ready event.
I hope this is of help to someone out there.
Instructions to build are all at the start of main.c please follow it to regenerate source files as I had to delete all the generated files to save space
Ive had to split the zip file into 2 files to stay below the 10MB limit, unzip them into the same directory
Kind regards
Gert van Biljon Show Less
Attached a sample project where I have the VADC and DMA running together using the DAVE 4.4.2 CE apps
I am using 2X VADC groups, each with 3 inputs, sampling in continuous mode
With 2X DMA channels running (one for each VADC group), transferring the result registers to RAM
DMA transfers are triggered on the VADC result ready event.
I hope this is of help to someone out there.
Instructions to build are all at the start of main.c please follow it to regenerate source files as I had to delete all the generated files to save space
Ive had to split the zip file into 2 files to stay below the 10MB limit, unzip them into the same directory
Kind regards
Gert van Biljon Show Less
XMC™
I am using the POSIF in the Quadrature Decoder mode.My problem is that the first movement is sometimes decoded in the wrong direction.After initializa...
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I am using the POSIF in the Quadrature Decoder mode.
My problem is that the first movement is sometimes decoded in the wrong direction.
After initialization the QCSV and QPSV bits in the PDBG register reflect the state of the PhaseA and PhaseB inputs. These seem to be correct for all states except when both are high. In this case both bits are low. After moving the sensor 4 positions both phases are high again and the bits are then correctly set to 1.
This error seems to cause the direction bit to be initialized incorrectly, which has the effect that this first movement is detected in the incorrect direction when the sensor starts with both phases high.
Is this a know error? Am I doing something wrong during the initialization? Is there a work-around? Show Less
My problem is that the first movement is sometimes decoded in the wrong direction.
After initialization the QCSV and QPSV bits in the PDBG register reflect the state of the PhaseA and PhaseB inputs. These seem to be correct for all states except when both are high. In this case both bits are low. After moving the sensor 4 positions both phases are high again and the bits are then correctly set to 1.
This error seems to cause the direction bit to be initialized incorrectly, which has the effect that this first movement is detected in the incorrect direction when the sensor starts with both phases high.
Is this a know error? Am I doing something wrong during the initialization? Is there a work-around? Show Less
XMC™
I have one of the ADC groups configured to control an external Multiplexer, the multiplexer is connected to channel 0 and I have a FIFO setup on 8 of ...
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I have one of the ADC groups configured to control an external Multiplexer, the multiplexer is connected to channel 0 and I have a FIFO setup on 8 of the registers.
I have configured the FIFO as described in the VADC application note, with an interrupt being generated on the tail of the FIFO. This interrupt is being called every time a new result enters the tail of the FIFO as expected, however I don't want to have to generate an interrupt every time one of the multiplexers channels are converted, I would like for the FIFO to be filled with all 8 results and then an interrupt generated on the last result, i can then store those 8 values else were, clear the FIFO and wait for the next conversion.
Is it possible to configure / use it in this way?
Im using a XMC4500. Show Less
I have configured the FIFO as described in the VADC application note, with an interrupt being generated on the tail of the FIFO. This interrupt is being called every time a new result enters the tail of the FIFO as expected, however I don't want to have to generate an interrupt every time one of the multiplexers channels are converted, I would like for the FIFO to be filled with all 8 results and then an interrupt generated on the last result, i can then store those 8 values else were, clear the FIFO and wait for the next conversion.
Is it possible to configure / use it in this way?
Im using a XMC4500. Show Less
XMC™
The FCE is a standard peripheral slave module which is controlled over a set of memory mapped registers. The FCE is fully synchronous with the CPU clo...
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The FCE is a standard peripheral slave module which is controlled over a set of memory mapped registers. The FCE is fully synchronous with the CPU clock and runs with a 1:1 clock ratio.
Depending on the hardware configuration the FCE may implement more CRC kernels with different CRC polynomials. There are 4 CRC kernels for 3 different types of CRC.
CRC Kernel 0 and 1: IEEE 802.3 CRC32 ethernet polynomia
CRC Kernel 2: CCITT CRC16 polynomial
CRC kernel 3: SAE J1850 CRC8 polynomial: Show Less
Depending on the hardware configuration the FCE may implement more CRC kernels with different CRC polynomials. There are 4 CRC kernels for 3 different types of CRC.
CRC Kernel 0 and 1: IEEE 802.3 CRC32 ethernet polynomia
CRC Kernel 2: CCITT CRC16 polynomial
CRC kernel 3: SAE J1850 CRC8 polynomial: Show Less
XMC™
I would have some clarifications about the memory flash usage for eeprom emulation working with an XMC4200 having 256Kb of program flash:Is the follow...
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I would have some clarifications about the memory flash usage for eeprom emulation working with an XMC4200 having 256Kb of program flash:
Is the following memory configuration allowed ? I have tried it but without success 😞
64kB for bootloader starting at address C000000
32kB for EEPROM emulation starting at address C010000 (sector S4 and S5)
160 kB for the application firmware starting at address C018000
At the contrary the following configuration works :
64kB for bootloader starting at address C000000
64kB for EEPROM emulation starting at address C010000 (sector S4 ,S5, S6 and S7)
128 kB for the application firmware starting at address C020000
I would prefer the first configuration to have more memory for the application
Thank you for the help Show Less
Is the following memory configuration allowed ? I have tried it but without success 😞
64kB for bootloader starting at address C000000
32kB for EEPROM emulation starting at address C010000 (sector S4 and S5)
160 kB for the application firmware starting at address C018000
At the contrary the following configuration works :
64kB for bootloader starting at address C000000
64kB for EEPROM emulation starting at address C010000 (sector S4 ,S5, S6 and S7)
128 kB for the application firmware starting at address C020000
I would prefer the first configuration to have more memory for the application
Thank you for the help Show Less
XMC™
Hi!I'm working with the xmc4800 automation board and in my object dictionary i've created several output objects (as record type) with 16 boolean entr...
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Hi!
I'm working with the xmc4800 automation board and in my object dictionary i've created several output objects (as record type) with 16 boolean entries and others output objects with 8 boolean entries. I know that i have to introduce padding for the 8bit objects, but when i do it i receive an output mapping error when i connect the board to Ethercat.
Is there a correct way to pad/align objects?
Thank you for any help Show Less
I'm working with the xmc4800 automation board and in my object dictionary i've created several output objects (as record type) with 16 boolean entries and others output objects with 8 boolean entries. I know that i have to introduce padding for the 8bit objects, but when i do it i receive an output mapping error when i connect the board to Ethercat.
Is there a correct way to pad/align objects?
Thank you for any help Show Less
XMC™
I have done the part of CCU8 and i use it to generate the spwm waveform. Now i don not know how to use the posif . i plan to use it to get the Rotatin...
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I have done the part of CCU8 and i use it to generate the spwm waveform. Now i don not know how to use the posif . i plan to use it to get the Rotating speed of the motor, but i don't know how to config the input of the posif.(i want to config A B Index with P5.0 P5.1 P5.2),and how to connet it with CCU4.i
i look for it in xmc_posif.h,but i don not which function can help me config the input and output of posif. Show Less
i look for it in xmc_posif.h,but i don not which function can help me config the input and output of posif. Show Less