Xmc4000

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I´m currently evaluating the XMC4000 family for one of my projects. Some questions came up:

- do samples received from ADC can be directly sent to external or internal memory with DMA (i.e without involving core)?

- do you know if XMC4000 could drive a 4-phase switch reluctance motor? At least to estimate if that could be possible.

- could you provide information about Boot Loader? How is it implemented?

- do have a slide explaining the Memory Protection Unit (to show configurability to give different access to several piece of code, such as no read, read only…)?

Thanks for your help
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Markus_Kroh
Employee
Employee
Hi Karmann Ghia,

thanks for working with our new ARM Cortex M4 - XMC4000 family. Some answers to your questions below:

- do samples received from ADC can be directly sent to external or internal memory with DMA (i.e without involving core)?
MK:yes, for sure plus you can already do some pre calculation in the ADC (limit checking, data reduction & filtering..)

- do you know if XMC4000 could drive a 4-phase switch reluctance motor? At least to estimate if that could be possible.
MK: yes, with our peripherals we can drive almost any motor, pls. have a look at the article on our web site:
http://www.infineon.com/dgdl/Implementing-Complex-Motor-Control-Algorithms-w-ARM-Processor-Core.pdf?...

While it is on a PMSM it shows a lot of the features & peripheral use.

- could you provide information about Boot Loader? How is it implemented?
MK: The boot loader is described in chapter 26 of the reference manual. 'startup modes' In general it always runs after reset and initiates the MCU and than hands over to the customer code. Alternatively it can be used to download code and e.g. reprogram the flash. It is also responsible to disable flash readout if the flash is protected!

- do have a slide explaining the Memory Protection Unit (to show configurability to give different access to several piece of code, such as no read, read only…)?
MK: There are two different 'protections'
1) the standard MPU integrated in the Cortex-M4 core
2) the flash protection implemented by Infineon (RefMan page 380 -- 8.4.8 Flash Protection)

1)The MPU is responsible for protecting code like tasks from interfering with each other in an RTOS application.

2) The flash protection is part of the IP protection we provide for our customers. It allows to set access right on portions or the whole chip (flash). The customer can set passwords for access and also disable the debug access, protecting the customer IP from modification or read out.

so long ...
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