Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

Level 1
Level 1

I have been getting the occasional Alarm Status 0x002C: Fatal Sync Error occur from my EtherCAT master. My project is based on the ETHCAT_SSC_AUT_BASE_XMC48 example project. I have distributed clocks enabled with a PDO period of 1ms. I'm using Slave Stack Code 5.12.

I have put an oscilloscope on to monitor the Sync0 SYNC0IRQHandler function and the EtherCAT ecat_ssc_timer_handler function. The ecat_ssc_timer_handler function is slowly drifting and occasionally crosses the SYNC0IRQHandler function.

The SYNC0IRQHandler has an interrupt priority of 30
ecat_ssc_timer_handler has an interrupt priority of 63

I think I have tracked down the problem to the SYNC0IRQHandler occasionally preempting the ecat_ssc_timer_handler when it is in the middle of incrementing Sync0WdCounter (ecatslv.c, DC_CheckWatchdog(), line 2163). If this is the case then the old value will be incremented and the reset of the value in SYNC0IRQHandler (ecatappl.c, Sync0_Isr(), line 576) will be missed. i.e. the old value of 1 will continue to be incremented to 2. If the ecat_ssc_timer_handler DC_CheckWatchdog() function then manages to check the Sync0WdCounter value on the next cycle before being interrupted it will raise a watchdog error resulting in the Fatal Sync Error.

To work around this problem I have:

  • updated the CPU_CTRL_XMC4_0 "Number of priority bits for priority grouping" value to: 4
  • modified the interrupt priorities to:
    INT_SYNC0, priority: 10, sub-priority: 0
    INT_SYNC1, priority: 10, sub-priority: 1
    ECAT_INTERRUPT_0, priority: 10, sub-priority: 2

Giving the ECAT_INTERRUPT_0 object (which calls ecat_ssc_timer_handler) the same priority as the INT_SYNC0 object (which calls SYNC0IRQHandler) will effectively serialize the two handlers, but the sub-priorities will give INT_SYNC0 and INT_SYNC1 order preference.

2 Replies
50 replies posted 25 replies posted 10 replies posted
The example you reference is only compatible with SSC5.11.

If you like to work with SSC5.12, you can download the example ETHCAT_SSC_XMC48 from here
Just follow the instructions/documentation of this example, but please take note, that the pinning needs to be adapted to the automation board.
The pinning of example ETHCAT_SSC_XMC48 origins from the XMC48 Relax Kit.

General advice: Every time you download a new EtherCAT APP make sure to erase the complete flash (e.g. using SEGGER).
By this you can make sure, the emulated EEPROM inside FLASH is erased as well and you new application is correctly installed.

Kind Regards

Level 1
Level 1
Hi Michael,

Thanks for the link to the example. It looks like the example has used the same solution, giving INTERRUPT_0 the same interrupt priority as INT_SYNC0 and INT_SYNC1.

In my case there is a higher priority interrupt function that may still be running briefly when any of the above interrupts are due. When it exits I would like to give priority to INT_SYNC0 before INTERRUPT_0 so it is quite handy using the sub-priority option.

The other main difference I can see is the implementation of ENABLE_ESC_INT_USER() and DISABLE_ESC_INT_USER(). Will implement that and I should be good to go.