XMC4700 SDRAM over EBU

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Level 1
Level 1
Hello everybody,

I am trying to implement the control for an 64 Mbit ISSI IS42S16400J on an XMC4700 (XMC4700-F144x2048). The mapping/routing of the SDRAM is done according to the mapping of the KIT_XMC45_EE2_001 SDRAM Hexagon-Board. In final application the SDRAM should be used as buffer between ADC (two channels) and SPI (both via DMA).

If I use the example code from the XMC_Lib, reading/writing test fails. Using the debugger memory seems to remain uninitializes (all zeros), although changes can be seen via memory monitor.

Does anybody have some hints where to start debugging - rather hardware or software issue - or is the example code not suitable for XMC4700?

Can anybody provide a working solution with SDRAM?

Is it true that the EBU clock needs to be limited to 120 MHz for use with SDRAM?

kind regards
1 Reply
lock attach
Attachments are accessible only for community members.
10 sign-ins 5 sign-ins First like received

Please have a look at attached example running in XMC48 Automation board.
While debugging issues with the EBU interfacing an external SDRAM, is always helpful to look at EBU_SDRSTAT register.
If you are using the clock synchronous mode (EBU_CLC.SYNC=1) the fCPU cannot exceed 120MHz.Actually the SDCLKO is limited to 80MHz as specified in the data sheet.