According to the Reference Manual (xmc4500_rm_v1.4_2014_04.pdf) the resulting CRC value can be obtained from the register RESm at any time. But the fact is, that the FCE needs at least one processor tackt to finish the calculations, e.g.:
uint32_t result;
// fisrt implementation
FCE_KE0->CRC = 0xFFFFFFFF; // CRC Seed
FCE_KE0->IR = 1;
FCE_KE0->IR = 2;
FCE_KE0->IR = 3;
result = FCE_KE0->RES; // <<< WRONG RESULT!!!
// second implementation
FCE_KE0->CRC = 0xFFFFFFFF; // CRC Seed
FCE_KE0->IR = 1;
FCE_KE0->IR = 2;
FCE_KE0->IR = 3;
__NOP();
result = FCE_KE0->RES; // <<< CORRECT RESULT!!!
My code is optimized with -O3 flag and executed from PSRAM at 120 MHz.
