XMC4400-F64K512 AB use pin RTC_XTAL1 input to generate interrupt using ERU0.1B1

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User7757
Level 2
Level 2
I would like to generate an interrupt on ERU0_0_IRQn on falling edge of an input signal on pin RTC_XTAL1. The Port I/O function table says RTC_XTAL1 is linked to ERU0.1B1. However, it does not seem to work. I am confident that my ERU is configured correctly, as I can make it work with any GPIO pins. So, the problem seems to come from the pin RTC_XTAL1.

XTALGPI1SEL is set to 0 in SCU.HDCR. Is there any other register I should look at to make the RTC_XTAL1 pin work with ERU?

Thanks,
Cedric
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3 Replies
User7757
Level 2
Level 2
Still waiting for an answer on this. If I could get a confirmation that this is not possible, then I would have to use another pin.
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jferreira
Employee
Employee
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Hi,

It should work. Please try, the following code.


#include "xmc_scu.h"
#include "xmc_eru.h"

#define ERU0_ETL1_INPUTB_SCU_HIB_SR1 XMC_ERU_ETL_INPUT_B1

int main(void)
{
XMC_ERU_ETL_CONFIG_t eru_etl_config =
{
.input_b = ERU0_ETL1_INPUTB_SCU_HIB_SR1,
.source = XMC_ERU_ETL_SOURCE_B,
.status_flag_mode = XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL,
.edge_detection = XMC_ERU_ETL_EDGE_DETECTION_RISING
};

XMC_SCU_HIB_EnableHibernateDomain();
XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput();
XMC_SCU_HIB_SetSR1Input(XMC_SCU_HIB_SR1_INPUT_XTAL_GPI);


XMC_ERU_ETL_Init(XMC_ERU0, 1, &eru_etl_config);

while(1U)
{
if (XMC_ERU_ETL_GetStatusFlag(XMC_ERU0, 1) == 0)
{
// input pressed
}
}
}


Let me know if you need further help.

regards,
Jesus
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User10969
Level 1
Level 1
Hi Jesus,

I currently face with same issue, using RTC_XTAL1 as ERU0.1B1 on XMC4500.
And I use XMClib v2.1.4 - XMC Peripheral Driver Library.

Unfortunately this 2 functions are not available for this lib:

XMC_SCU_CLOCK_EnableLowPowerOscillatorGeneralPurposeInput();
XMC_SCU_HIB_SetSR1Input(XMC_SCU_HIB_SR1_INPUT_XTAL_GPI);

Are there another functions available in my lib which I can use ? Or can you show me which register need to be initialized for this purpose ?

Thanks in advance.
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