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jsmith678x
Level 4
Level 4
100 sign-ins 25 replies posted First solution authored

Hi,

We have this figure in the reference manual. 

17.8.2 Data Alignment

jsmith678x_0-1649156509140.png

How we have to interpret this in 12-bit mode? We have 16-bit result in 12-bit mode?

 

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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hi,

In order to increase the resolution or remove some noise from the input signal, the XMC4000 VADC implements three Standard Data Reduction modes. A simple built-in accumulator can sum up two, three or four consecutive conversions into one Result Register. This applies to all available result registers except the Global Result Register. This can increase the resolution without any software computation. So summing up 4 bits can increase the resolution of the final result. The result will be less than 16 bits though.

Best Regards,
Vasanth

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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hi,

In order to increase the resolution or remove some noise from the input signal, the XMC4000 VADC implements three Standard Data Reduction modes. A simple built-in accumulator can sum up two, three or four consecutive conversions into one Result Register. This applies to all available result registers except the Global Result Register. This can increase the resolution without any software computation. So summing up 4 bits can increase the resolution of the final result. The result will be less than 16 bits though.

Best Regards,
Vasanth

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