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amanning
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I am trying to use the DAC of the XMC4200 together with the DMA, but the data is not being transferred by the DMA controller.
The DAC channel 0 is configured in Data Mode with internal trigger and a frequency of 24kHz. The Service Request, Run and Analog Enable bits are set.

The DMA Line Router (DLR) is configured with line 1 with RS1 = 5, which is DAC.SR0. Line 1 is enabled with LN1 set.

The DMA channel 1 is configured with the Destination Address Register set to 0x48018014, which is the DAC input register. The CFGH.DEST_PER is set to 1 to use DLR line 1 and CFGL.HS_SEL_DST is set to 0 to select Hardware handshaking.
The DMA is enabled with DMACFGREG.DMA_EN set.

As far as I know everthing is configured correctly, but it does not work!
The application is a modified version that used the DMA to send the data to a USIC and that works correctly.

Does anyone have any ideas where the problem could be?

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Maragani
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hi @amanning 

Since the USIC-DMA code example is working at your end, we have to verify the modified code, kindly share the same if possible.

Please recheck the sample code of SPI_DMA - XMC4200 and readme files one more time related to configurations and settings from ModusToolbox. 

May I know what is the trigger source for DMA in your application. 

Thanks 

Sateesh M

 

 

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amanning
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I have attached a text file with a few code snippets showing my initialization code for the DAC and the DMA.

The DMA trigger should be the DAC FIFO empty service request. If I understand the hardware correctly it should work as follows:
- The DAC is set to internal trigger mode using a frequency of 24kHz
- The DMA fills the DAC input FIFO with data
- The DAC takes the input data until the FIFO is empty
- The empty FIFO triggers the Service Request 0
- Via the DLR the DMA triggers the next transfer
- This continues until the DMA has transferred all the data
- The DMA sets its Service Request

I am not sure what the correct sequence is to start the sequence. I have tried different sequences, but nothing has worked yet. It seems if the DAC trigger is enabled before data is in the FIFO it immediately clears the run bit. So now I start the DMA first to fill the DAC Input FIFO before enabling the DAC. Is the correct sequence discribed in any document?

What I see is that the first bytes are transferred but the DMA does not continue with the rest.

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amanning
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In the XMC4200 Errata Sheet I have just seen this:


DAC_CM.003 FIFO usage limitation in “Data Processing Mode”
The reference manual describes in section X.2.1.2 of the DAC chapter that the
FIFO “...is introduced to allow a longer request latency...”.
“Data Processing Mode” is the only operation mode based on FIFO usage. For
this mode it was intended that a service request is raised only if the FIFO runs
into the empty state after a DAC trigger occured.
In fact service request(s) occur after each DAC trigger. Additionally some
service requests can be delayed. Due to this misbehaviour a reliable refill
mechanism cannot be implemented.
Implications
Unexpectedly delayed and superfluous service requests from the DAC FIFO
inhibit the implementation of useful refill mechanisms based on interrupt service
routines or GPDMA service.
Workaround
None.

Is this the reason it is not working?

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Maragani
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hi @amanning 

Please go through the attached DAC Application note, you will understand how DAC works. And also the previous questions which you mentioned in the shared code example also get clarified. 

Please use this code example, it will have all the necessary code flow and information on initialization, to use this code example you have to install ModusToolbox IDE. 

Looks code configurations is correct, please check the initialization sequence of DMA by comparing with the attached code example. 

 

Thanks 

Sateesh M

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EnochMitchell
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@amanning wrote:

I am trying to use the DAC of the XMC4200 together with the DMA, but the data is not being transferred by the DMA controller.
The DAC channel 0 is configured in Data Mode with internal trigger and a frequency of 24kHz. The Service Request, Run and Analog Enable bits are set.

The DMA Line Router (DLR) is configured with line 1 with RS1 = 5, which is DAC.SR0. Line 1 is enabled with LN1 set.

The DMA channel 1 is configured with the Destination Address Register set to 0x48018014, which is the DAC input register. The CFGH.DEST_PER is set to 1 to use DLR line 1 and CFGL.HS_SEL_DST is set to 0 to select Hardware handshaking.
The DMA is enabled with DMACFGREG.DMA_EN set.

As far as I know everthing is configured correctly, but it does not work!
The application is a modified version that used the DMA to send the data to a USIC and that works correctly.

Does anyone have any ideas where the problem could be?


I consistently encounter issues with data integrity. Despite configuring the SPI settings according to the datasheet and reference manual, the received data seems to contain errors or inconsistencies. I've verified the hardware connections, cross-checked the clock and data configurations, and even adjusted timing parameters, but failed. 

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Maragani
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Hi All

Please check the attached code example of DAC using DMA.

The attached code is modified from DMA_PWM to DMA_DAC. 

The attached code will generate Ramp/Triangle voltage using DMA transfer without any interrupt, and created for Single channel.

The code flow is like:

1) From main -> cybsp_init(); -> init_cycfg_all(); -> cycfg_config_init(); -> init_cycfg_dmas();

2) in this DMA_CH0_config configuration modified asper requirement, and  trigger  source  PWM_0_sr0_0_TRIGGER_IN  definition is set for DAC (#define PWM_0_sr0_0_TRIGGER_IN 5) as per your request

3)After peripheral init, back to main for 

1) DAC GPIO & DAC Peripheral Init

2) DMA Enable

The result will be out on XMC4200 board - MICROBUS pin AN/P14.5.

DAC Output.jpg

Please check and give your feedback, further any details kindly let me know.

 

Thanks 

Sateesh M

 

 

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Thank you for the example. I have not got the ModusToolbox installed yet, so I am not able to directly test your example.

But looking at the source and configuration files, it seems this project is configured for the XMC4500 Relax Kit board, with the XMC4500-F100x1024 Controller.

If your output is from this Controller, I can believe it works, but does the same code work on a XMC4200 Controller? As far as I can see the DMA and DAC is configured the same as my example, but the DAC does not trigger the next DMA transfer.

As far as I know the DAC ch0 Output is on Pin P14.8, not P14.5 as stated above.

I have now installed the ModulToolBox and tried to use your example, but I cannot get it to work.

From the cinfiguration files it looked like the example was configured to run on the XMC4500 Relax Kit, so I am also starting with this configuration. 

The example builds and downloads correctly, but there is no DAC output. When I look at the code I cannot understand how it could ever work! 

In main.c the *LLP variable is set to &dma_ll[0]. This wou;ld seem to be correct, but in cycfg_dmas.c the variable LLP is used to configure DMA channel 0. This channel cannot be connected to the DAC SR0. DMA channel 1 needs to be used, but channel 1 is configured for the CCU4 SR and the destination pointer is also a CCU4 register.

Can you please check your example (and maybe clean it up a bit, as everything is still for the PWM).

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jhonalone
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  1. Verify DMA settings: Double-check DMA configuration and ensure it aligns with the modified inshot app download requirements.
  2. Debug USIC communication: Examine the interaction between DMA and USIC, looking for any discrepancies or issues in the data transfer.
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Maragani
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hi @amanning 

Please install MTB in you work machine and check the code if possible, going forward from Infineon we are supporting MTB for all of our platform devices.

From the shared code I understand that the DAC initialization sequence is not followed correctly. 

Actual Sequence asper sample code is like this below: 

XMC_DMA_Init(XMC_DMA0);
XMC_DMA_CH_Init(DMA_CH0_HW, DMA_CH0_NUM, &DMA_CH0_config);
XMC_DMA_CH_EnableEvent(DMA_CH0_HW, DMA_CH0_NUM, DMA_CH0_events);
XMC_DMA_CH_SetEventHandler(DMA_CH0_HW, DMA_CH0_NUM, NULL);

As per your shared code DMA_CH0_config is completed after the initialization, please recheck and modify the code accordingly.

Hope this will resolve your issue, still issue is present please do let me know, we can connect on call and discuss.

Thanks & Best Regards

Sateesh M

 

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Sorry, I do not understand what you are trying to tell me!

You say "DMA_CH0_config is completed after the initialization" in my code. But in my code I do not have "DMA_CH0_config". 

In my code I first initialize the DMA with "XMC_DMA_Init()" then initialize the channel with "XMC_DMA_CH_Init()", the same as your example code.

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Maragani
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Hi @amanning 

I have created sample DAC code using DMA for XMC4200, the attached code example will produce DAC output at pin P14.8 using DMA.

In this code example, I have configured both DMA channels 0 & 1 for the data transfers to DAC & used channel0 to work with DAC, you can use DMA channel1 for the same application.

Thanks

Sateesh M

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amanning
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I have tried this new version, but it does not work for me. All I see is that the DAC output jumps to 1.77V.

I am a little confused about the correct block size. The table of values is 72 words long, so I asume the block size should also be 72. In the linked list it is set to 72, but in cycfg_dmas.c in the config and reload the value is set to 1. I have tried changing it to 72 but it didn't help.

What I don't understand is why the GPDMA0_CH0::CTLH::BLOCK_TS changes to 32 when the program runs.

As far as I can see everything is configured correctly, but the DMA just does not transfer the data to the DAC.

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Maragani
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hi @amanning 

Please share the scope output traces. I will arrange meeting request.

 

Thanks

Sateesh M

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amanning
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The scope output is attached. It is not very interesting. The output just changes from high impedience to an output value of 1.77V when the program starts.

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