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hsj_sbdinc
Level 1
Level 1
First reply posted First question asked Welcome!

 

Hey Everyone,

I have an application where I need to configure UART (P1.5 & P1.6) and I2C (P0.8 & P2.1) using same USIC Channel 0 on XMC1302. I know there are 2 channel available but one USIC channel is dedicated for another use in the application. At some points in the application I need to talk to peripherals over UART and others over I2C. This Swap depends on the use input for eg. Input Signal High and/or Low

Goes High:
When signal goes High send some bytes of data over the UART TX and wait till I get the ACK (ASC RX Interrupt) and the swap to the I2C communication. This has to happen fast and effectively.

High:
After swapping to the I2C will have to communicate till the signal stays high.

Low:
When the signal goes low, immediately required to stop the I2C and swap to the UART and do TX-RX.

I have Initialize and reinitialize the UART and I2C where required but it seems to be some configuration mismatch that I am reading incorrect data. That is how I am doing the swapping:

Switch to UART

NVIC_DisableIRQ(USIC0_0_IRQn); // Disable the Interrupt for Ch0
NVIC_ClearPendingIRQ(USIC0_0_IRQn); // Clear the Interrupt for Ch0

// De-Initializing the I2C Registers
CH_I2C->KSCFG = 0x00000000UL;
CH_I2C->FDR = 0x00000000UL;
CH_I2C->BRG = 0x00000000UL;
CH_I2C->SCTR = 0x00000000UL;
CH_I2C->TCSR = 0x00000000UL;
CH_I2C->CCR = 0x00000000UL;
CH_I2C->PCR = 0x00000000UL;
// Re-Initializing for UART

//Kernel State Configuration Register - Module Disable + Bit Protection for MODEN
CH_UART->KSCFG |= (1U << USIC_CH_KSCFG_MODEN_Pos) |
(1U << USIC_CH_KSCFG_BPMODEN_Pos);

CH_UART->FDR = 2U << USIC_CH_FDR_DM_Pos;
CH_UART->FDR = (811U << USIC_CH_FDR_STEP_Pos);
CH_UART->BRG = (4U << USIC_CH_BRG_PDIV_Pos) |
(0U << USIC_CH_BRG_PCTQ_Pos)|
(10U << USIC_CH_BRG_DCTQ_Pos);

CH_UART->SCTR = (1U << USIC_CH_SCTR_PDL_Pos) |
(1U << USIC_CH_SCTR_TRM_Pos) |
(7U << USIC_CH_SCTR_FLE_Pos) |
(7U << USIC_CH_SCTR_WLE_Pos);

CH_UART->TCSR = (1U << USIC_CH_TCSR_TDEN_Pos) |
(1U << USIC_CH_TCSR_TDSSM_Pos);

CH_UART->PCR_ASCMode = (1U << USIC_CH_PCR_ASCMode_SMD_Pos) |
(0U << USIC_CH_PCR_ASCMode_STPB_Pos) |
(6U << USIC_CH_PCR_ASCMode_SP_Pos) |
(1U << USIC_CH_PCR_ASCMode_TSTEN_Pos) |
(0U << USIC_CH_PCR_ASCMode_RSTEN_Pos);

CH_UART->TBCTR = (1U << USIC_CH_TBCTR_LIMIT_Pos);

CH_UART->RBCTR = (1U << USIC_CH_RBCTR_LIMIT_Pos) |
(1U << USIC_CH_RBCTR_SIZE_Pos) |
(1U << USIC_CH_RBCTR_LOF_Pos) |
(1U << USIC_CH_RBCTR_RNM_Pos) |
(3U << USIC_CH_RBCTR_RCIM_Pos);

CH_UART->CCR = (2U << USIC_CH_CCR_MODE_Pos) |
(0U << USIC_CH_CCR_TSIEN_Pos) |
(1U << USIC_CH_CCR_RIEN_Pos);

CH_UART->INPR = (0U << USIC_CH_INPR_RINP_Pos);

NVIC_EnableIRQ(USIC0_0_IRQn);

Switch to I2C

NVIC_DisableIRQ(USIC0_0_IRQn); // Disable the Interrupt for Ch0
NVIC_ClearPendingIRQ(USIC0_0_IRQn); // Clear the Interrupt for Ch0

// De-Initializing the UART Registers
CH_UART->KSCFG = 0x00000000UL;
CH_UART->FDR = 0x00000000UL;
CH_UART->SCTR = 0x00000000UL;
CH_UART->TCSR = 0x00000000UL;
CH_UART->CCR = 0x00000000UL;
CH_UART->PCR_ASCMode = 0x00000000UL;
CH_UART->TBCTR = 0x00000000UL;
CH_UART->RBCTR = 0x00000000UL;
CH_UART->INPR = 0x00000000UL;

//Re-Initializing for I2C
//Kernel State Configuration Register - Module Enable + Bit Protection for MODEN
CH_I2C->KSCFG |= (1U << USIC_CH_KSCFG_MODEN_Pos) |
(1U << USIC_CH_KSCFG_BPMODEN_Pos);

CH_I2C->FDR = (2U << USIC_CH_FDR_DM_Pos) |
(320U << USIC_CH_FDR_STEP_Pos);
CH_I2C->BRG = (0U << USIC_CH_BRG_PDIV_Pos) |
(0U << USIC_CH_BRG_PCTQ_Pos)|
(24U << USIC_CH_BRG_DCTQ_Pos);

CH_I2C->SCTR = (1U << USIC_CH_SCTR_PDL_Pos) |
(1U << USIC_CH_SCTR_TRM_Pos) |
(1U << USIC_CH_SCTR_SDIR_Pos) |
(63U << USIC_CH_SCTR_FLE_Pos) |
(7U << USIC_CH_SCTR_WLE_Pos);

CH_I2C->TCSR = (1U << USIC_CH_TCSR_TDEN_Pos) |
(1U << USIC_CH_TCSR_TDSSM_Pos);

//Configuration of Protocol Control Register
CH_I2C->PCR_IICMode = (1U << USIC_CH_PCR_IICMode_STIM_Pos);

//Configuration of Channel Control Register
CH_I2C->CCR = (4U << USIC_CH_CCR_MODE_Pos);

Any suggestions and help would be appreciated. Thanks.

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1 Solution
Pradeep_PN
Moderator
Moderator
Moderator
250 sign-ins 100 solutions authored 25 likes received

Hi @hsj_sbdinc ,

Greetings from Infineon.

There aren't any  Initialization and De-Initialization functions in XMC Lib for 1302 specifically.

You can do Initialization and De-Initialization of UART and I2C by below API'S

 XMC_I2C_CH_Init();
// Configure input pins
// Configure interrupts / events
XMC_I2C_CH_Start();
// Configure output pins
XMC_I2C_CH_Stop();

XMC_UART_CH_Init();
// Configure input pins
// Configure interrupts / events
XMC_UART_CH_Start();
// Configure output pins
XMC_UART_CH_Stop();

Reference Link for declaration of above library:https://infineon.github.io/mtb-xmclib-cat3/xmc1_api_reference_manual/html/index.html

Hope this helps and kindly let me know if you need any further information.

Best Regards,
Pradeep.

View solution in original post

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3 Replies
Pradeep_PN
Moderator
Moderator
Moderator
250 sign-ins 100 solutions authored 25 likes received

Hi @hsj_sbdinc ,

Greetings from Infineon.

Can you please share your entire project so that we can look into the issue clearly.

Best Regards
Pradeep.

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hsj_sbdinc
Level 1
Level 1
First reply posted First question asked Welcome!

Hi Pradeep,

Unfortunately the whole project cannot be shared due to confidentiality.

Are there any Initialization and De-Initialization functions in XMC Lib for 1302 specifically?

Thanks.

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Pradeep_PN
Moderator
Moderator
Moderator
250 sign-ins 100 solutions authored 25 likes received

Hi @hsj_sbdinc ,

Greetings from Infineon.

There aren't any  Initialization and De-Initialization functions in XMC Lib for 1302 specifically.

You can do Initialization and De-Initialization of UART and I2C by below API'S

 XMC_I2C_CH_Init();
// Configure input pins
// Configure interrupts / events
XMC_I2C_CH_Start();
// Configure output pins
XMC_I2C_CH_Stop();

XMC_UART_CH_Init();
// Configure input pins
// Configure interrupts / events
XMC_UART_CH_Start();
// Configure output pins
XMC_UART_CH_Stop();

Reference Link for declaration of above library:https://infineon.github.io/mtb-xmclib-cat3/xmc1_api_reference_manual/html/index.html

Hope this helps and kindly let me know if you need any further information.

Best Regards,
Pradeep.

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