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amanning
Level 4
Level 4
50 sign-ins 25 replies posted 10 questions asked

A XMC program can be set to run in either the cached or non-cached Flash memory space. Our application runs in the cached address space which allows it to run faster. We also have an update possibility within the application.

I am not sure if it is OK to use the cached Flash addresses during the re-programming. Does it make any difference which address space is used.

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Pradeep_PN
Moderator
Moderator
Moderator
50 likes received 250 sign-ins 100 solutions authored

Hi @amanning ,

Greetings from Infineon.

Below is the clarification for your query.

cached and non-cached flash memory is pointing to same physical memory . To enable cache memory, linker script need to modify in order to point your program run from cachable memory .
Reprogramming will always happen on non-cacheable memory .The data present in the cached memory and programmed flash are different at the time of reprograming. so in order to reprogram from the cached memory we need to make sure system reset or POR so new firmware/program get loaded into cache.

Hope this helps, Kindly let me know if you need any further information.

Best Regards
Pradeep.

 

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andriy
Level 1
Level 1
10 sign-ins 5 replies posted 5 sign-ins

When you write to flash, you have to use non-cached address space beginning at 0xc0000000.

See how I (*no affiliation to Infineon*) did flash driver in Zephyr RTOS:

https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/flash/soc_flash_xmc4xxx.c#L70

Be careful, XMC_FLASH_ProgramPage() needs a 4 byte aligned input, and if I remember correctly an erase operation is needed before writing.

But in a related question, I've always wondered where the JLink XMC debug probe automatically changes the flashing/erase address from 0x80000000 to 0xc0000000 (if it needs to). The reason I suspect this is that I've never had problems setting VMA and LMA in the linker script to 0x80000000 (as this would simplify my linker script in Zephyr RTOS) and then flashing via the debug probe.

Can someone from Infineon clarify this please? Or do I need to contact someone at Segger?

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Pradeep_PN
Moderator
Moderator
Moderator
50 likes received 250 sign-ins 100 solutions authored

Hi @amanning ,

Greetings from Infineon.

Below is the clarification for your query.

cached and non-cached flash memory is pointing to same physical memory . To enable cache memory, linker script need to modify in order to point your program run from cachable memory .
Reprogramming will always happen on non-cacheable memory .The data present in the cached memory and programmed flash are different at the time of reprograming. so in order to reprogram from the cached memory we need to make sure system reset or POR so new firmware/program get loaded into cache.

Hope this helps, Kindly let me know if you need any further information.

Best Regards
Pradeep.

 

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