Wrong and missing CAN Frame count interrupt

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Level 3
Level 3

I have found a problem with the frame count interrupt and the analyzer mode on a XMC4700.

The analyzer mode is not working on node 1 and node 3. It works on node 0,2,4 and 5.
But the interrupt of the working nodes are wrong too.
Configured is INT_O0 für all 6 nodes.

Reached int for node0: INT_O0 ( CAN0_0_IRQHandler) what is correct.
Reached int for node1: no irq on any can traffic (fault).
Reached int for node2: INT_O2 ( CAN0_2_IRQHandler). But INT_O0 was configured.
Reached int for node3: no irq on any can traffic (fault).
Reached int for node4: INT_O3 ( CAN0_3_IRQHandler). But INT_O0 was configured.
Reached int for node5: INT_O4 ( CAN0_4_IRQHandler). But INT_O0 was configured.

I set the CALM-Bit in all 6 nodes: NCR = 0x80 on all 6 nodes.
I set the Crame Count Interrupt enable CFCIE and set CFMOD to Bit-timing mode in NFCR for all 6 nodes (NFCR=0x500000)
I set the Frame counter interrupt node pointer to INT_O0 for all 6 nodes
( NIPR = 0x0111 for Node0; NIPR = 0x0222 for Node1; NIPR = 0x0333 for Node2; NIPR = 0x0444 for Node3; NIPR = 0x0555 for Node4; NIPR = 0x0666 for Node5; )

The not working nodes 1 and 3 have no update on the frame count register (NFCR [15:0]) on can traffic, all other nodes do this.
Alle 6 nodes are connected to the bus (no init bit is set in NCR) and connected to a physical working can bus.
The status of the node shows no error (NSR = 0x00) on the not working nodes 1 and 3

If i didn't set the calm mode and test the normal can RX and TX an all 6 nodes,
all 6 nodes working correct with their configured interrupt:

Reached int for node0: INT_O1 ( CAN0_1_IRQHandler )
Reached int for node1: INT_O2 ( CAN0_2_IRQHandler )
Reached int for node2: INT_O3 ( CAN0_3_IRQHandler )
Reached int for node3: INT_O4 ( CAN0_4_IRQHandler )
Reached int for node4: INT_O5 ( CAN0_5_IRQHandler )
Reached int for node5: INT_O6 ( CAN0_6_IRQHandler )

On each node, one rx messageobject and one tx message object is connected (and working).
So wiring is ok, configured irq's are ok, the function is exact how described in the manual (for normal operation!!!).

Does anyone knows, what happends with the XMC4700.

I haven't found a description of this behavior in any of the documents.
3 Replies
Level 3
Level 3
Has anyone any idea, why bit-timing mode isn'd working on node 1 and node 3 ?

Has anyone successfully used the bit timing mode on node 1 or node 3 ??

That the interrupts do not work properly is not that important.
The main problem is first of all, that the bit timing mode works basically on node 1 and node 3.
Level 3
Level 3

Is anyone from infineon there, who can have a look to this error (in Chip and/or reference manual).

The last XMC4700 Reference Manual V1.3 (2016-07) explained the Bit timing analysis ( in ref manual )
-> if CFCIE is set in NFCR5 (example Node5), the interrupt configured in NIPR5 with CFCINP should rised.
Have a look to Figure 19.10 (Can Node Interrups) at Frame Counter Overflow/Event.

The XMC4700 processor triggers an interrupt, but no matter what is written in register NIPR [CFINP], a fixed interrupt is always triggered.

The Figure 19-10 shows a Node Timer Event. But no information is given to the described register: NTRTx -> TEIE and NIPRx -> TEINP.
Is TEINP a bug in the ref manual ?

I have configured all combinations of interrupts in NIPR5: 0x0000, 0x1111, 0x5555, as well as the undocumented TEINP: 0x11111, 0x55555, 0x12345, 0x111111, ...
The processor shows the CFCOV-Flag in NFCR5, CFCIE is enabled in NFCR5.

But the processor trigger always CAN0_5_IRQHandler in bit timing analysis (this is the intended IRQ for Node4, if i use bit timing analysis in Node5).
In normal mode, the message object triggers th configured CAN0_6_IRQHandler (Interrupt output line INT_O6 is selected).

For Testing, i only init Node5 alone. No other Node is working and initialized. No message object is initialized for events.

Is this a bug in the prozessor?

I didn't find any about this in the Errata Sheet XMC4700 XMC4800 AA 01_04 | 2018-05-22.
10 replies posted 5 replies posted Welcome!
according to your description the problem occurs when the frame counter interrupt node of all 6 CAN nodes are assigned to the one INT_O0, right ?
- all 6 CAN nodes in CALM mode, CFCIE enabled and set CFMOD to Bit-timing mode
- all 6 CAN nodes are connected on one CAN bus
in tests:
CAN frame will be triggered from an external device.
NFCR.CFC value of node 1 and 3 are not updated (but it works on node 0,2,4 and 5)
please check/correct above statement and please upload your Interrupt Service routine SW of INT_O0. is debug tool used here ? when yes, you can check it easily via register window.
here is appnote https://www.infineon.com/dgdl/Infineon-MultiCAN-XMC4000-AP32300-AN-v01_00-EN.pdf?fileId=5546d4624e76...