VADC reading floating condition

Report Inappropriate Content · ‎Feb 14, 2017

I am using XMC4500 Relax Kit.
I have connected VREF to VDD3.3.
I have also connected P14.0 and P14.8 to VDD3.3.
Yet after reading result register I am unable to read 4095 value (expected - Full Scale Reading). I get a different value every time.


void adcInit(void)
{
	/* Initialization data of VADC Global resources */
	XMC_VADC_GLOBAL_CONFIG_t g_global_config =
	{
		.clock_config =
		{
			.analog_clock_divider  = 3,
			.msb_conversion_clock  = 0,
			.arbiter_clock_divider = 1
		},
	};

	//---------------------- Voltage Measurement ------------------------------------------//

	/* Initialization data of a VADC group */
	XMC_VADC_GROUP_CONFIG_t g_voltage_group_config =
	{
		.class1 =
		{
			.conversion_mode_standard 	 = XMC_VADC_CONVMODE_12BIT,
			.sample_time_std_conv 	     = 3U,
		}
	};

	XMC_VADC_QUEUE_CONFIG_t g_voltage_queue_config;

	/* Channel configuration data */
	XMC_VADC_CHANNEL_CONFIG_t  g_voltage_channel_config =
	{
		.input_class       = XMC_VADC_CHANNEL_CONV_GROUP_CLASS1,
		.result_reg_number = RES_REG_NUMBER,
		.alias_channel     = XMC_VADC_CHANNEL_ALIAS_DISABLED
	};

	/* Result configuration data */
	XMC_VADC_RESULT_CONFIG_t g_voltage_result_config =
	{
		.event_gen_enable = true,
		.data_reduction_control = 3,
		.wait_for_read_mode = true,
		.post_processing_mode = XMC_VADC_DMM_REDUCTION_MODE
	};

	/* Queue Entry */
	XMC_VADC_QUEUE_ENTRY_t g_voltage_queue_entry =
	{
		.channel_num = CHANNEL_NUMBER,
		.refill_needed = true, /* Refill is needed */
		.generate_interrupt = true, /* Interrupt generation is needed */
		.external_trigger = true  /* External trigger is required */
	};

	/* Initialize the VADC global registers */
	XMC_VADC_GLOBAL_Init(VADC, &g_global_config);

	/* Configure a conversion kernel */
	XMC_VADC_GROUP_Init(VADC_GROUP0_PTR, &g_voltage_group_config);

	XMC_VADC_GROUP_QueueInit(VADC_GROUP0_PTR, &g_voltage_queue_config);

	/* Configure a channel belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ChannelInit(VADC_GROUP0_PTR,CHANNEL_NUMBER, &g_voltage_channel_config);

	/* Configure a result resource belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ResultInit(VADC_GROUP0_PTR, RES_REG_NUMBER, &g_voltage_result_config);
	/* Add the channel to the queue */
	XMC_VADC_GROUP_QueueInsertChannel(VADC_GROUP0_PTR, g_voltage_queue_entry);

	/* Connect Request Source Event to the NVIC nodes */
	//XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(VADC_GROUP0_PTR, XMC_VADC_SR_GROUP_SR0);
	XMC_VADC_GROUP_SetResultInterruptNode(VADC_GROUP0_PTR, RES_REG_NUMBER, XMC_VADC_SR_GROUP_SR0);
	//XMC_VADC_GROUP_ChannelSetEventInterruptNode(VADC_GROUP0_PTR, CHANNEL_NUMBER, XMC_VADC_SR_GROUP_SR0);
	/* Enable IRQ */
	NVIC_SetPriority(VADC0_G0_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
	NVIC_EnableIRQ(VADC0_G0_0_IRQn);

	/* Enable the analog converters */
	XMC_VADC_GROUP_SetPowerMode(VADC_GROUP0_PTR, XMC_VADC_GROUP_POWERMODE_NORMAL);



	//--------------------------------- High Side Current ------------------------------------------//

	XMC_VADC_GROUP_CONFIG_t g_current_high_group_config =
	{
		.class1 =
		{
			.conversion_mode_standard 	 = XMC_VADC_CONVMODE_12BIT,
			.sample_time_std_conv 	     = 3U,
		}
	};

	XMC_VADC_QUEUE_CONFIG_t g_current_high_queue_config;

	/* Channel configuration data */
	XMC_VADC_CHANNEL_CONFIG_t  g_current_high_channel_config =
	{
		.input_class       = XMC_VADC_CHANNEL_CONV_GROUP_CLASS1,
		.result_reg_number = RES_REG_NUMBER,
		.alias_channel     = XMC_VADC_CHANNEL_ALIAS_DISABLED
	};

	/* Result configuration data */
	XMC_VADC_RESULT_CONFIG_t g_current_high_result_config =
	{
		.wait_for_read_mode = true,
	};

	/* Queue Entry */
	XMC_VADC_QUEUE_ENTRY_t g_current_high_queue_entry =
	{
		.channel_num = CHANNEL_NUMBER,
		.refill_needed = true, /* Refill is needed */
		.generate_interrupt = true, /* Interrupt generation is needed */
		.external_trigger = true  /* External trigger is required */
	};

	//* Initialize the VADC global registers */
	XMC_VADC_GLOBAL_Init(VADC, &g_global_config);

	/* Configure a conversion kernel */
	XMC_VADC_GROUP_Init(VADC_GROUP1_PTR, &g_current_high_group_config);

	XMC_VADC_GROUP_QueueInit(VADC_GROUP1_PTR, &g_current_high_queue_config);

	/* Configure a channel belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ChannelInit(VADC_GROUP1_PTR,CHANNEL_NUMBER, &g_current_high_channel_config);

	/* Configure a result resource belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ResultInit(VADC_GROUP1_PTR, RES_REG_NUMBER, &g_current_high_result_config);

	/* Add the channel to the queue */
	XMC_VADC_GROUP_QueueInsertChannel(VADC_GROUP1_PTR, g_current_high_queue_entry);

	/* Connect Request Source Event to the NVIC nodes */
	XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(VADC_GROUP1_PTR, XMC_VADC_SR_GROUP_SR0);

	/* Enable IRQ */
	NVIC_SetPriority(VADC0_G1_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
	NVIC_EnableIRQ(VADC0_G1_0_IRQn);

	/* Enable the analog converters */
	XMC_VADC_GROUP_SetPowerMode(VADC_GROUP1_PTR, XMC_VADC_GROUP_POWERMODE_NORMAL);

	//---------------------- Low Side Current  ------------------------------------------//

	XMC_VADC_GROUP_CONFIG_t g_current_low_group_config =
	{
		.class1 =
		{
			.conversion_mode_standard 	 = XMC_VADC_CONVMODE_12BIT,
			.sample_time_std_conv 	     = 3U,
		}
	};

	XMC_VADC_QUEUE_CONFIG_t g_current_low_queue_config;

	/* Channel configuration data */
	XMC_VADC_CHANNEL_CONFIG_t  g_current_low_channel_config =
	{
		.input_class       = XMC_VADC_CHANNEL_CONV_GROUP_CLASS1,
		.result_reg_number = RES_REG_NUMBER,
		.alias_channel     = XMC_VADC_CHANNEL_ALIAS_DISABLED
	};

	/* Result configuration data */
	XMC_VADC_RESULT_CONFIG_t g_current_low_result_config =
	{
		.wait_for_read_mode = true,
	};

	/* Queue Entry */
	XMC_VADC_QUEUE_ENTRY_t g_current_low_queue_entry =
	{
		.channel_num = CHANNEL_NUMBER,
		.refill_needed = true, /* Refill is needed */
		.generate_interrupt = true, /* Interrupt generation is needed */
		.external_trigger = true  /* External trigger is required */
	};

	/* Initialize the VADC global registers */
	XMC_VADC_GLOBAL_Init(VADC, &g_global_config);

	/* Configure a conversion kernel */
	XMC_VADC_GROUP_Init(VADC_GROUP2_PTR, &g_current_low_group_config);

	XMC_VADC_GROUP_QueueInit(VADC_GROUP2_PTR, &g_current_low_queue_config);

	/* Configure a channel belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ChannelInit(VADC_GROUP2_PTR, CHANNEL_NUMBER, &g_current_low_channel_config);

	/* Configure a result resource belonging to the aforesaid conversion kernel */
	XMC_VADC_GROUP_ResultInit(VADC_GROUP2_PTR, RES_REG_NUMBER, &g_current_low_result_config);

	/* Add the channel to the queue */
	XMC_VADC_GROUP_QueueInsertChannel(VADC_GROUP2_PTR, g_current_low_queue_entry);

	/* Connect Request Source Event to the NVIC nodes */
	XMC_VADC_GROUP_QueueSetReqSrcEventInterruptNode(VADC_GROUP2_PTR, XMC_VADC_SR_GROUP_SR0);

	/* Enable IRQ */
	NVIC_SetPriority(VADC0_G2_0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
	NVIC_EnableIRQ(VADC0_G2_0_IRQn);

	/* Enable the analog converters */
	XMC_VADC_GROUP_SetPowerMode(VADC_GROUP2_PTR, XMC_VADC_GROUP_POWERMODE_NORMAL);

	//---------------------- Common Routine  ------------------------------------------//

	voltageComplete = false;
	currentCompleteLow = false;
	currentCompleteLow = false;

	/* Perform calibration of the converter */
	XMC_VADC_GLOBAL_StartupCalibration(VADC);

	//XMC_VADC_GROUP_QueueTriggerConversion(VADC_GROUP0_PTR);
	//XMC_VADC_GROUP_QueueTriggerConversion(VADC_GROUP1_PTR);
	//XMC_VADC_GROUP_QueueTriggerConversion(VADC_GROUP2_PTR);
}

void VADC0_G0_0_IRQHandler(void)
{
	/* Read the result register */
	voltageAdc = XMC_VADC_GROUP_GetResult(VADC_GROUP0_PTR, RES_REG_NUMBER);

	voltageComplete = true;
	/* Acknowledge the interrupt */
	XMC_VADC_GROUP_QueueClearReqSrcEvent(VADC_GROUP0_PTR);
}

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VADC reading floating condition