USIC TX FIFO not transmitting all my data

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cross mob
Not applicable
Hello Forum.

I thought I had an understanding of the USIC (in UART mode).

I have a 20 byte buffer that I need to send packets out on to a listening peripheral.
However, I'm only seeing16 bytes. Well that's all the other side is receiving.

I am using an XMC4500.

My code is setup:


#define UART_RX P3_12
#define UART_TX P3_11

XMC_GPIO_CONFIG_t uart_tx =
{
.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1,
.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH,
.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE
};
XMC_GPIO_CONFIG_t uart_rx =
{
.mode = XMC_GPIO_MODE_INPUT_TRISTATE,
.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH,
.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SOFT_EDGE
};

XMC_UART_CH_CONFIG_t uart_config =
{

.baudrate = 115200U,
.data_bits = 8U,
.frame_length = 8U,
.stop_bits = 1U,
.oversampling = 16U,
.parity_mode = XMC_USIC_CH_PARITY_MODE_NONE

};

/* code to setup uart */
XMC_UART_CH_Init(XMC_UART2_CH1, &uart_config);
XMC_UART_CH_SetInputSource(XMC_UART2_CH1, XMC_UART_CH_INPUT_RXD, USIC2_C1_DX0_P3_12);


/* Setup FIFO's */
XMC_USIC_CH_TXFIFO_Configure(XMC_UART2_CH1,32U,XMC_USIC_CH_FIFO_SIZE_32WORDS,1U);
XMC_USIC_CH_RXFIFO_Configure(XMC_UART2_CH1,0U, XMC_USIC_CH_FIFO_SIZE_32WORDS,0U);

XMC_UART_CH_Start(XMC_UART2_CH1);

XMC_GPIO_Init(UART_TX,&uart_tx);
XMC_GPIO_Init(UART_RX,&uart_rx);

/*Set service request for UART protocol events*/
XMC_USIC_CH_SetInterruptNodePointer(XMC_UART2_CH1, XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL,0U);

/*Set service request for tx FIFO transmit interrupt*/
XMC_USIC_CH_TXFIFO_SetInterruptNodePointer(XMC_UART2_CH1, XMC_USIC_CH_TXFIFO_INTERRUPT_NODE_POINTER_STANDARD, 3U);

/*Set service request for rx FIFO receive interrupt*/
XMC_USIC_CH_RXFIFO_SetInterruptNodePointer(XMC_UART2_CH1, XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_STANDARD, 0x5U);
XMC_USIC_CH_RXFIFO_SetInterruptNodePointer(XMC_UART2_CH1, XMC_USIC_CH_RXFIFO_INTERRUPT_NODE_POINTER_ALTERNATE, 0x5U);

/*Set priority and enable NVIC node for transmit interrupt*/
NVIC_SetPriority(USIC2_3_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63U, 0U));
NVIC_EnableIRQ(USIC2_3_IRQn);

/*Set priority and enable NVIC node for receive interrupt*/
NVIC_SetPriority(USIC2_5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63U, 0U));
NVIC_EnableIRQ(USIC2_5_IRQn);

/* Ready to receive */
XMC_USIC_CH_RXFIFO_EnableEvent(XMC_UART2_CH1, (uint32_t)((uint32_t)XMC_USIC_CH_RXFIFO_EVENT_CONF_STANDARD | (uint32_t)XMC_USIC_CH_RXFIFO_EVENT_CONF_ALTERNATE));




Help?
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4 Replies
Not applicable
More on this... I must be doing something wrong with the trigger because in my transmit ISR -- if I delay before every byte into the FIFO the other gets it.

Here is a snip of the code:


/*Transmit ISR for the UART*/
void USIC2_3_IRQHandler()
{

if (g_runtime_ptr->tx_data_index < g_runtime_ptr->tx_data_count)
{

/*When Transmit FIFO is enabled*/
/*Fill the transmit FIFO */
while (XMC_USIC_CH_TXFIFO_IsFull(XMC_UART2_CH1) == false)
{
if (g_runtime_ptr->tx_data_index < g_runtime_ptr->tx_data_count)
{
/*Load the FIFO byte by byte till either FIFO is full or all data is loaded*/
XMC_UART_CH_Transmit(XMC_UART2_CH1,g_runtime_ptr->tx_data[g_runtime_ptr->tx_data_index]);
my_delay(20000);
(g_runtime_ptr->tx_data_index)++;
}
else
{
break;
}
}


}


if I take out the my_delay the other side get screwed up data. It's like the baud rate is being ignored...

I'm not sure what I'm missing.
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DRubeša
Employee
Employee
First solution authored First like received
Hi -stv,

can you please send your main file like you sent me for the PWM issue? It will save me some time if I start with something that is already working if there is a delay.

Best regards,
Deni
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Not applicable
Hi Deni.

Here it is. I've enclosed all the pieces that I think are relevant. I don't have a nice sample code I had with the PWM, but I took out code chunks and put them into one file.
Let me know if this is too confusing.

Thanks again for the help.

-stv
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Not applicable
Deni,

Have you had a chance to look at this? I think there is another thread that is having a very similar problem.

Thanks.
-stv
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