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Not applicable
I'm trying to send small raw Ethernet packets (broadcasted), but encounter the following problems before I
even try to send anything with XMC_ETH_MAC_SendFrame().

The issues:

1. even though I clear the P15_PDISC bits 8 (RMII_CLK) and 9 (CRS_DV)
per some tips from the forum, XMC_ETH_MAC_Reset() [in XMCLib/inc/xmc_eth_mac.h]
still waits forever in its while loop. The ETH_BUS_MODE_SWR bit was actually
1 even before I tried to set it to 1 just before the while loop.

2. XMC_ETH_PHY_IsDeviceIdValid() will return
XMC_ETH_PHY_STATUS_ERROR_DEVICE_ID
when trying to read the DP83848C's registers
REG_PHYIDR1 and REG_PHYIDR2
(via XMC_ETH_MAC_ReadPhy()). The returned phy_id[12]
are both zero, but should be 0x2000 and 0x5c90 according to
#defines in xmc_eth_phy_dp83848.c .

PHY_ADDR was 0 first, but a recent (April 2016) forum post by
Niclas claimed that you have to use PHY_ADDR == 1, but I tried
that too and the XMC_ETH_MAC_ReadPhy() calls still return zeros.

Anyone encountered these problems before?

Regards,
Mathias Båge


P.S. I couldn't upload any files (forum upload window said "ethernet.c: Invalid File", so
I pasted it below. The initialization code is from the ETH_LWIP app, but with all lwIP
stuff removed. The main program (not pasted below) only calls do_ethernet().
DAVE_Init() does nothing.

pasted file:
---------------------------------------------------------------------------------------------

typedef unsigned char u8_t;
typedef signed char s8_t;
typedef unsigned short u16_t;
typedef signed short s16_t;
typedef unsigned long u32_t;
typedef signed long s32_t;


#define ETH_RECTOR_0_CRS_DV XMC_GPIO_PORT15, 9U
#define ETH_RECTOR_0_RXER XMC_GPIO_PORT2, 4U
#define ETH_RECTOR_0_RXD0 XMC_GPIO_PORT2, 2U
#define ETH_RECTOR_0_RXD1 XMC_GPIO_PORT2, 3U
#define ETH_RECTOR_0_TXEN XMC_GPIO_PORT2, 5U
#define ETH_RECTOR_0_TXD0 XMC_GPIO_PORT2, 8U
#define ETH_RECTOR_0_TXD1 XMC_GPIO_PORT2, 9U
#define ETH_RECTOR_0_RMII_CLK XMC_GPIO_PORT15, 8U
#define ETH_RECTOR_0_MDC XMC_GPIO_PORT2, 7U
#define ETH_RECTOR_0_MDIO XMC_GPIO_PORT2, 0U
#define ETH_RECTOR_0_PIN_LIST_SIZE 10U




#define ETH_RECTOR_0_PHY_ADDR (1) // also tried 0

#define ETH_RECTOR_0_NUM_RX_BUF (4U)
#define ETH_RECTOR_0_NUM_TX_BUF (4U)



/*PHY identifiers*/
#define PHY_USER_DEFINED (0U)
#define PHY_KSZ8081RNB (1U)
#define PHY_KSZ8031RNL (2U)
#define PHY_DP83848C (3U)

#ifndef PHY_DEVICE_NAME
#define PHY_DEVICE_NAME PHY_DP83848C
#endif

#include "xmc_gpio.h"
#include "xmc_eth_mac.h"
#include "xmc_eth_phy.h"
#include

/* MAC ADDRESS*/

#define MAC_ADDR0 (0x12U)
#define MAC_ADDR1 (0x34U)
#define MAC_ADDR2 (0x56U)
#define MAC_ADDR3 (0x78U)
#define MAC_ADDR4 (0x9AU)
#define MAC_ADDR5 (0xBCU)

#define MAC_ADDR ((uint64_t)MAC_ADDR0 | \
((uint64_t)MAC_ADDR1 << 😎 | \
((uint64_t)MAC_ADDR2 << 16) | \
((uint64_t)MAC_ADDR3 << 24) | \
((uint64_t)MAC_ADDR4 << 32) | \
((uint64_t)MAC_ADDR5 << 40))


#if defined(__ICCARM__)
#pragma data_alignment=4
static XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_rx_desc[ETH_RECTOR_0_NUM_RX_BUF];
#pragma data_alignment=4
static XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_tx_desc[ETH_RECTOR_0_NUM_TX_BUF];
#pragma data_alignment=4
static uint8_t ETH_RECTOR_0_rx_buf[ETH_RECTOR_0_NUM_RX_BUF][XMC_ETH_MAC_BUF_SIZE];
#pragma data_alignment=4
static uint8_t ETH_RECTOR_0_tx_buf[ETH_RECTOR_0_NUM_TX_BUF][XMC_ETH_MAC_BUF_SIZE];
#elif defined(__CC_ARM)
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_rx_desc[ETH_RECTOR_0_NUM_RX_BUF] __attribute__((section ("RW_IRAM1")));
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_tx_desc[ETH_RECTOR_0_NUM_TX_BUF] __attribute__((section ("RW_IRAM1")));
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_rx_buf[ETH_RECTOR_0_NUM_RX_BUF][XMC_ETH_MAC_BUF_SIZE] __attribute__((section ("RW_IRAM1")));
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_tx_buf[ETH_RECTOR_0_NUM_TX_BUF][XMC_ETH_MAC_BUF_SIZE] __attribute__((section ("RW_IRAM1")));
#elif defined(__GNUC__)
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_rx_desc[ETH_RECTOR_0_NUM_RX_BUF] __attribute__((section ("ETH_RAM")));
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_tx_desc[ETH_RECTOR_0_NUM_TX_BUF] __attribute__((section ("ETH_RAM")));
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_rx_buf[ETH_RECTOR_0_NUM_RX_BUF][XMC_ETH_MAC_BUF_SIZE] __attribute__((section ("ETH_RAM")));
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_tx_buf[ETH_RECTOR_0_NUM_TX_BUF][XMC_ETH_MAC_BUF_SIZE] __attribute__((section ("ETH_RAM")));
#else
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_rx_desc[ETH_RECTOR_0_NUM_RX_BUF];
static __attribute__((aligned(4))) XMC_ETH_MAC_DMA_DESC_t ETH_RECTOR_0_tx_desc[ETH_RECTOR_0_NUM_TX_BUF];
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_rx_buf[ETH_RECTOR_0_NUM_RX_BUF][XMC_ETH_MAC_BUF_SIZE];
static __attribute__((aligned(4))) uint8_t ETH_RECTOR_0_tx_buf[ETH_RECTOR_0_NUM_TX_BUF][XMC_ETH_MAC_BUF_SIZE];
#endif


const XMC_ETH_PHY_CONFIG_t eth_phy_config =
{
.interface = XMC_ETH_LINK_INTERFACE_RMII,
.enable_auto_negotiate = true
};

XMC_ETH_MAC_t eth_mac =
{
.regs = ETH0,
.address = MAC_ADDR,
.rx_desc = ETH_RECTOR_0_rx_desc,
.tx_desc = ETH_RECTOR_0_tx_desc,
.rx_buf = &ETH_RECTOR_0_rx_buf[0][0],
.tx_buf = &ETH_RECTOR_0_tx_buf[0][0],
.num_rx_buf = ETH_RECTOR_0_NUM_RX_BUF,
.num_tx_buf = ETH_RECTOR_0_NUM_TX_BUF
};

#if defined(__ICCARM__)
#pragma data_alignment=4
static uint8_t buffer[XMC_ETH_MAC_BUF_SIZE];
#else
static __attribute__((aligned(4))) uint8_t buffer[XMC_ETH_MAC_BUF_SIZE];
#endif



#define ETH_PAD_SIZE 0 // maybe 2
#define ETHARP_HWADDR_LEN 6

struct eth_addr {
u8_t addr[ETHARP_HWADDR_LEN];
};

struct ethpacket {
u8_t padding[ETH_PAD_SIZE];
struct eth_addr dest;
struct eth_addr src;
u16_t type;
u8_t payload[46];
// CRC done in hardware
};


/*Local function declarations*/
//int ethernet_output(uint8_t *frame, uint32_t frame_length);
//static void ethernetif_input(void *arg);
void ethernet_init();


const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}};
const struct eth_addr myaddr = {{MAC_ADDR0, MAC_ADDR1, MAC_ADDR2, MAC_ADDR3, MAC_ADDR4, MAC_ADDR5}};

//int ethernet_output(uint8_t *frame, uint32_t frame_length);

void ethernet_init();


void
do_ethernet() {
XMC_ETH_MAC_STATUS_t status;
u8_t packetbuffer[100];
struct eth_addr *dest;
struct ethpacket ethpkt;

//Use ETH0.CLK_RMIIC (P15.8) and ETH0.CRS_DVC (P15.9) as digital inputs
PORT15->PDISC &= ~(PORT15_PDISC_PDIS8_Msk | PORT15_PDISC_PDIS9_Msk);

ethernet_init();

while (1) {
memcpy(&ethpkt.dest, &ethbroadcast, 6);
memcpy(&ethpkt.src, &myaddr, 6);
ethpkt.type= 0x4711;
memcpy(ethpkt.payload, "hej du glade tag en spade och gräv ner dig!!!\n", 46);
memcpy(&packetbuffer[0], &ethpkt, sizeof ethpkt);

status= XMC_ETH_MAC_SendFrame(&eth_mac, &ethpkt, sizeof (ethpkt), 0U);
if (status != XMC_ETH_MAC_STATUS_OK) {
// SEGGER_RTT_printf(0,"sendframe error\n");
return;
}
}
}



void
ethernet_init()
{
XMC_ETH_MAC_PORT_CTRL_t port_control;
XMC_GPIO_CONFIG_t gpio_config;

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_CRS_DV, &gpio_config);

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_RXER, &gpio_config);

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_RXD0, &gpio_config);

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_RXD1, &gpio_config);

gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
gpio_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
XMC_GPIO_Init(ETH_RECTOR_0_TXEN, &gpio_config);

gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
gpio_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
XMC_GPIO_Init(ETH_RECTOR_0_TXD0, &gpio_config);

gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
gpio_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
XMC_GPIO_Init(ETH_RECTOR_0_TXD1, &gpio_config);

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_RMII_CLK, &gpio_config);

gpio_config.output_strength = XMC_GPIO_OUTPUT_STRENGTH_STRONG_SHARP_EDGE;
gpio_config.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL_ALT1;
XMC_GPIO_Init(ETH_RECTOR_0_MDC, &gpio_config);

gpio_config.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
XMC_GPIO_Init(ETH_RECTOR_0_MDIO, &gpio_config);

XMC_GPIO_SetHardwareControl(ETH_RECTOR_0_MDIO, XMC_GPIO_HWCTRL_PERIPHERAL1);

XMC_ETH_PHY_Init(&eth_mac, ETH_RECTOR_0_PHY_ADDR, &eth_phy_config);

XMC_ETH_MAC_SetLink(&eth_mac, XMC_ETH_LINK_SPEED_100M, XMC_ETH_LINK_DUPLEX_FULL);

port_control.mode = XMC_ETH_MAC_PORT_CTRL_MODE_RMII;
port_control.rxd0 = (XMC_ETH_MAC_PORT_CTRL_RXD0_t)0U;
port_control.rxd1 = (XMC_ETH_MAC_PORT_CTRL_RXD1_t)0U;
port_control.clk_rmii = (XMC_ETH_MAC_PORT_CTRL_CLK_RMII_t)2U;
port_control.crs_dv = (XMC_ETH_MAC_PORT_CTRL_CRS_DV_t)2U;
port_control.rxer = (XMC_ETH_MAC_PORT_CTRL_RXER_t)0U;
port_control.mdio = (XMC_ETH_MAC_PORT_CTRL_MDIO_t)1U;
XMC_ETH_MAC_SetPortControl(&eth_mac, port_control);

(void)XMC_ETH_MAC_Init(&eth_mac);

XMC_ETH_MAC_DisableJumboFrame(&eth_mac);

XMC_ETH_MAC_EnableRx(&eth_mac);
XMC_ETH_MAC_EnableTx(&eth_mac);
}
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2 Replies
Not applicable
I also tried to send UDP packets via ETH_LWIP, and the same problems arise.
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jferreira
Employee
Employee
First like received 750 replies posted 500 replies posted
Hi,

See the attached example. It is just sending a single broadcast frame that can be monitored using WireShark.
Let me know if you still need further support.

Best regards,
Jesus
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