Master SPI for the Reading of multi_channel AD-Convertor / the frame>64bit

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cross mob
Level 4
Level 4
Hi everybody,
I will read the AD-data from ADS131A04 like this> see the page 36 of datasheet. texasInstruments
it should be 16+4*24 bits, what is 112 pulses of SCLK. SCLK should be very quick / min 25 MHz
But the CS/ signal have to be only during reading obligatory Low. / without the moving to Hi, what is the effect of use two frames....
I did not find similary application
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