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XMC™

Not applicable
Hello,

I tried to develop a communication to an internet controler (ENC28J60) via XMC1200. I used the SPI example from the "XMC_Periperal_Library_v2.1.2"
without any App's.
It seems that my XMC1200 is able to send datas in Master Mode right but he's not able to receive datas.
How have I to change wich register?

Thank you for any help!

Sending datas:

//Write Dummy Byte
data[0] = 0x00;
data[1] = 0x00;
while(i < 2){
SPI_CH_Transmit(data[i++], XMC_SPI_CH_MODE_STANDARD);
//Wait till the byte has been transmitted
while((USIC0_CH0->PSR_SSCMode & XMC_SPI_CH_STATUS_FLAG_TRANSMIT_SHIFT_INDICATION) == 0U);
USIC0_CH0->PSCR |= USIC_CH_PSR_SSCMode_TBIF_Msk; //Flag PSR.TBIF is cleared.
}

//Disable Slave Select line
XMC_SPI_CH_DisableSlaveSelect();
//-------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Receiving datas:

uint32_t CCR_RegCpy = USIC0_CH0->CCR;

//Disable SPI mode
USIC0_CH0->CCR &= ~(((uint32_t)(USIC_SPI_MODE & USIC_CH_CCR_MODE_Msk)));
//Slave Mode
USIC0_CH0->PCR = 0;
//Enable SPI mode
USIC0_CH0->CCR = CCR_RegCpy;

while((USIC0_CH0->PSR_SSCMode & USIC_CH_PSR_SSCMode_AIF_Msk) == 0); // Wait until alt. received flag is set
USIC0_CH0->PSCR |= USIC_CH_PSR_SSCMode_AIF_Msk; //Flag PSR.AIF is cleared
buffer = USIC0_CH0->RBUF;

buffer is always "0xA0"
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5 Replies
chismo
New Contributor
Hello,

Do you mean that during the time XMC device is to receive SPI data, there is an external SPI master that will provide the chip select and clock signal?

Typically in SPI communications, there is just one master and one or more slaves.
In full duplex mode, the master transmits on one edge of the clock, and receives on the alternate edge of the clock.

To reconfigure the SPI from master to slave, I think that you just need to:
- reconfigure the pin functions through USIC DXnCR and port IOCR registers
- reset PCR register

Best Regards,
Min Wei
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Not applicable
Hello Min Wei,

Thank you for your quick answer!
I have read a lot of your comments in this forum about SPI.

I mean: My master controler send a command to my ENC28J60 component and after then 2 dummy bytes to get the response from the ENC28J60.

My question: Have I to change (after sending dummy bytes) my master in slave or will I get the answer of ENC28J60 automatic in USIC0_CH0->RBUF?

Regards,
Bernd
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chismo
New Contributor
Hello Bernd,

Yes, in this case there is no need to change the SPI mode.
The data will be expected in RBUF, just that you will also need to read out all the dummy response from the slave.
This is because the master always receives whatever that is on the MRST line while transmitting.

For example, if the specific command is a 3-byte sequence consisting of:
1st byte: master sends command and receives dummy byte from slave
2nd and 3rd bytes: master sends dummy to receive the 2-byte useful data from slave
Therefore, the master application has to read and discard the first byte received, and keep only the last 2 bytes.

Regards,
Min Wei
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Not applicable
Hello Min Wei,

Thank you very much for your answer.
Now I understand but could you tell me what I have to init when the slave devise is CPOL (Clock Polarity) == 0
and CPHA (Clock Phase) == 0 ?

Regards,
Bernd
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chismo
New Contributor
Hello Bernd,

This refers to the SPI mode 0 where data is latched on each rising edge of SCLKOUT signal and transmitted on each falling edge of the same clock.
To configure the USIC SPI master to support this mode, the register bit field BRG.SCLKCFG needs to be set to 0x2.

For example, to change SCLKCFG from 0x0 to 0x2:

USIC0_CH0->BRG |= 0x80000000;


Regards,
Min Wei
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