High side vs Synchronous Rectification Modes

[Bond_007]

Hi Team,

We are using the Sensored BLDC project "BLDC_SCALAR_HALL_XMC13_Power_Tool". We have tested both High side and Synchronous Rectification modes and captured the required waveforms to observe the changes As mentioned in the "DEMO-PTOOL-300W user guide" in section 1.7 under table 5 of unipolar block commutation with synchronous rectification, "this technique aims to improve the total losses in the system".  But we didn't observe the minor/major changes as mentioned above.

Where can we observe the particular total losses improvement? Is any parameter to be observed, Could anyone explain us briefly? 



Thanking you in advance

Vamshi.B

[Owen_Su · Accepted solution]

Hi, @Bond_007 ,

    Here I provide you some method to test the loss:

   1. These two modes improve the commutation process, the less commutation time, the less losses in the system, so you can observe the ON/OFF time of a MOS in different modes but in the same switching state(active).

    2. Observe single MOS, detect Voltage and current of the MOS, integral loss.

    3. You can also use Vin * Iin - Vout * Iout, calculate the system losses.

    4. Compare the efficiency of the system under the two modes.

    5. Or you can run the board in different modes for the same time to measure the temperature rise in both modes.

    Hope this can help you.

Regards,

Owen_Su

[Bond_007]

Thank you for the reply @Owen_Su,

We will Check it and observe as you suggested.

Thank you.