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Level 4
Level 4
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I am trying to follow the configuration steps of section 2.7 Time Equidistant Sampling of the application note: https://www.infineon.com/dgdl/Infineon-VADC-XMC1200_XMC1300-AP32304-AN-v01_10-EN.pdf?fileId=5546d462...

I have been using time sequenced interrupts to trigger ADC requests but would like to reduce the measurement jitter so am trying to go for time equidistant sampling but it is not working:

Unfortunately, the detail in section 2.7 is insufficient to know what is required to get things going. In particular, the items in bold are completely unclear:

2) Configure the Request Source. In the Source Control Register (GxQCTRL0 or GxASCTR), enable the mode for equidistant sampling (TMEN=b1, TMWC=b1) and the standard gating must be enabled (ENGT = b10 orb11).Choose, as usual, the sequence needed.
Does Configure the Request Source" refer to the text following it or to an independent action?
The "Choose as usual, the sequence needed" comment should reference a source or something else to be clear.

7) Configure a timer (e.g CCU4) to be clocked by the GxARBCNT signal. This ensures the best synchronicity.Generate a level signal with this timer that is high (respectively low) at least longer that the ADCconversion time of the channel to be equidistant. The period match can be used as a trigger for the ADC.
Where is more information about "Configure a timer (e.g CCU4) to be clocked by the GxARBCNT signal" available? The ARBCNT term is only included 5 times in the reference manual with most references in tables that use it.
Detail is needed here to understand how the timer should be set up.

Ideally a code sample would be provided for this because three sentences does not begin to provide sufficient detail.


2 Replies
Level 1
Level 1
5 sign-ins First reply posted First question asked

I am also trying to follow that section 2.7 for what I need to do. I interpreted the step 2) to be the sequence of API calls with: 

Then, on top of the above API calls, the QCTRL0 register of VADC_Gx also needs to have its TMEN and TMWC bits set to 1.
However, I also struggle with the step 7), as just like you, I do not see any reference in either the RM or VADC app notes, for configuring a CCU4 timer to use the GxARBCNT signal for clocking it. So far, I have only found in the RM, Table 17-13 of section 17.14.3, to show that VADC.GxARBCNT pins are connected to CCU4x.IN3G pins.
Any luck on further info for 7) yet?
Level 2
Level 2
First like received 25 sign-ins 10 replies posted

Any luck...any sample source example from Infineon would be better . Please help.