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Hi,
I am using Neb1DX evl board and trying to set 2 UART ports.
First uart is Wiced_uart_1 (USART1) and it is working great but the second uart is WICED_UART_3 (UART7) without rts and cts.
When I try to send to Neb1DX I get UnhandledInterrupt while on UART1 is working ...
First init of UART 3
/* Initialise ring buffer */
ring_buffer_init(&rx_buffer_wifi, rx_data_wifi, UART_RX_BUFFER_SIZE );
/* Initialise UART. A ring buffer is used to hold received characters */
wiced_uart_init( WICED_UART_3 , &uart_config_WIFI, &rx_buffer_wifi );
in platform.c seems like the interrupts are configured correctly
WWD_RTOS_DEFINE_ISR( uart7_irq )
{
platform_uart_irq( &platform_uart_drivers[WICED_UART_3] );
}
WWD_RTOS_DEFINE_ISR( usart3_rx_uart7_tx_dma_irq )
{
/* Determine which peripheral is currently using this DMA stream */
uint32_t dmaChan = platform_uart_peripherals[WICED_UART_2].rx_dma_config.stream->CR & DMA_SxCR_CHSEL;
if(dmaChan == platform_uart_peripherals[WICED_UART_2].rx_dma_config.channel){
platform_uart_rx_dma_irq( &platform_uart_drivers[WICED_UART_2] );
}
else{
platform_uart_tx_dma_irq( &platform_uart_drivers[WICED_UART_3] );
}
}
WWD_RTOS_DEFINE_ISR( uart7_rx_dma_irq )
{
platform_uart_rx_dma_irq( &platform_uart_drivers[WICED_UART_3] );
}
WWD_RTOS_MAP_ISR( uart7_irq , UART7_irq )
WWD_RTOS_MAP_ISR( usart3_rx_uart7_tx_dma_irq, DMA1_Stream1_irq )
WWD_RTOS_MAP_ISR( uart7_rx_dma_irq , DMA1_Stream3_irq )
Small note:
When I send packet through uart (from Neb1DX to pc) I recieve it but Neb1DX stuck on line
host_rtos_get_semaphore( &driver->tx_complete, NEVER_TIMEOUT, WICED_TRUE );
in function
platform_result_t platform_uart_transmit_bytes( platform_uart_driver_t* driver, const uint8_t* data_out, uint32_t size )
I read about UART and seems its fine to set 2 uarts.
I thought maybe uart polarity is incorrect , how can I change polarity to check ?
more ideas?
Thanks,
David
Solved! Go to Solution.
- Labels:
-
UART
-
WICED Studio
-
Wifi+Bluetooth
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Based on this question : Re: Nebula board UART is not working
the fix is in platform.c file. I used WICED_UART_2 and changed the complete & error flags
working code:
[
WICED_UART_2] =
{
.port = USART3,
.tx_pin = &platform_gpio_pins[WICED_GPIO_28],
.rx_pin = &platform_gpio_pins[WICED_GPIO_29],
// .cts_pin = &platform_gpio_pins[WICED_GPIO_30],
// .rts_pin = &platform_gpio_pins[WICED_GPIO_31],
.cts_pin = NULL,
.rts_pin = NULL,
.tx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream4,
.channel = DMA_Channel_7,
.irq_vector = DMA1_Stream4_IRQn,
//.complete_flags = DMA_HISR_TCIF6,
//.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
.complete_flags = DMA_HISR_TCIF4,
.error_flags = ( DMA_HISR_TEIF4 | DMA_HISR_FEIF4 ),
},
.rx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream1,
.channel = DMA_Channel_4,
.irq_vector = DMA1_Stream1_IRQn,
//.complete_flags = DMA_HISR_TCIF5,
//.error_flags = ( DMA_HISR_TEIF5 | DMA_HISR_FEIF5 | DMA_HISR_DMEIF5 ),
.complete_flags = DMA_LISR_TCIF1,
.error_flags = ( DMA_LISR_TEIF1 | DMA_LISR_FEIF1 | DMA_LISR_DMEIF1 ),
},
},
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Based on this question : Re: Nebula board UART is not working
the fix is in platform.c file. I used WICED_UART_2 and changed the complete & error flags
working code:
[
WICED_UART_2] =
{
.port = USART3,
.tx_pin = &platform_gpio_pins[WICED_GPIO_28],
.rx_pin = &platform_gpio_pins[WICED_GPIO_29],
// .cts_pin = &platform_gpio_pins[WICED_GPIO_30],
// .rts_pin = &platform_gpio_pins[WICED_GPIO_31],
.cts_pin = NULL,
.rts_pin = NULL,
.tx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream4,
.channel = DMA_Channel_7,
.irq_vector = DMA1_Stream4_IRQn,
//.complete_flags = DMA_HISR_TCIF6,
//.error_flags = ( DMA_HISR_TEIF6 | DMA_HISR_FEIF6 ),
.complete_flags = DMA_HISR_TCIF4,
.error_flags = ( DMA_HISR_TEIF4 | DMA_HISR_FEIF4 ),
},
.rx_dma_config =
{
.controller = DMA1,
.stream = DMA1_Stream1,
.channel = DMA_Channel_4,
.irq_vector = DMA1_Stream1_IRQn,
//.complete_flags = DMA_HISR_TCIF5,
//.error_flags = ( DMA_HISR_TEIF5 | DMA_HISR_FEIF5 | DMA_HISR_DMEIF5 ),
.complete_flags = DMA_LISR_TCIF1,
.error_flags = ( DMA_LISR_TEIF1 | DMA_LISR_FEIF1 | DMA_LISR_DMEIF1 ),
},
},