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Wi-Fi Combo Forum Discussions

Anonymous
Not applicable

Hi

Are there any plans for priding the platform files for stm32f429 discovery board in Wiced SDK .

Since the stm32f429 has many peripherals and more memory than the stm32f07 discovery I think the SDK needs a little more updates on the Platform and MCU files...

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1 Solution

Hi,

To setup STM32F429 Discovery board with BCM43362 module please take a look at this blog, SN8000 WiFi Module with STM32F429 Discovery Board. For STM32F429 Discovery board there are no external pull up needed.

Seyhan

View solution in original post

20 Replies
user_2177781
Level 5
Level 5
25 likes received 10 likes received 5 likes given

I'm looking into the same STM32 controller, is there any plans on releasing platform files for this MCU?

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Hi,

I do not have a STM32F429 Discovery board. I will get one and share the platform file with you.

Seyhan

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Sounds awesome. Will this include dl files for a 2mb flash version of the STM32F429?

I'm using this board, if it is any help: 32F429IDISCOVERY Discovery kit for STM32 F429/439 lines - with STM32F429ZI MCU - STMicroelectronics

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Anonymous
Not applicable

seyhan

Sounds great ,, thanks seyhan...

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seyhan, anything we can do to help?

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Hi,

To setup STM32F429 Discovery board with BCM43362 module please take a look at this blog, SN8000 WiFi Module with STM32F429 Discovery Board. For STM32F429 Discovery board there are no external pull up needed.

Seyhan

This is super work! I will try it out.

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Anonymous
Not applicable

Hi seyhan

Why is this core frequncy for the MCU is given as 120Mhz, eventhough the stm32f429 supports upto 180Mhz?

Is this beacause of some restriction induced by the wifi communication?

Regards

Hari,

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Hi,

To setup the clock for STM32F4xxx please take a look at http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/u...

Below is the setup for 168MHz.

diff --git a/platforms/STDiscovery429_BCM43362/platform_config.h b/platforms/STDiscovery429_BCM43362/platform_config.h

index 1302ddd..2868690 100644

--- a/platforms/STDiscovery429_BCM43362/platform_config.h

+++ b/platforms/STDiscovery429_BCM43362/platform_config.h

@@ -24,7 +24,7 @@ extern "C" {

  ******************************************************/

/*  CPU clock : 120 MHz */

-#define CPU_CLOCK_HZ        ( 120000000 )

+#define CPU_CLOCK_HZ        ( 168000000 )

/*  Use external crystal */

#define HSE_SOURCE          ( RCC_HSE_ON )

@@ -45,13 +45,13 @@ extern "C" {

#define PLL_M_CONSTANT      ( 8 )

/*  PLLN : 240 */

-#define PLL_N_CONSTANT      ( 240 )

+#define PLL_N_CONSTANT      ( 336 )

/*  PLLP : 2 */

#define PLL_P_CONSTANT      ( 2 )

/*  PLLQ : 5 */

-#define PPL_Q_CONSTANT      ( 5 )

+#define PPL_Q_CONSTANT      ( 7 )

/*  System clock source  : PLL clock */

#define SYSTEM_CLOCK_SOURCE  ( RCC_SYSCLKSource_PLLCLK )

Seyhan

That is very nice work!

Regards

- Renejos

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Anonymous
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hi renejos

Did you solved that issue of having difficulty in using PA0, PA1 and PA2 as GPIO?

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Yes I did, PA0 was connected to a button which later in the code was defined an input, so moving button to another location fixed that one. PA1 & 2 was a bit more tricky but after finding the schematic for the evaluation board it turns out that these pins are use as interrupt pins for the onboard gyro, which can not be turned off. So cutting the trace between the MCU and gyro release the PA1 & 2.

next bump is to get UART4 working on PA1 & 0. I found another thread which was having trouble using UART4, and it was validated to be a SDK issue, so...

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Anonymous
Not applicable

In the platform file provided for stm32f429 in location

..WICED\platform\MCU\STM32F4xx\GCC\STM32F407

The SRAM is given as 128 K where as stm32f429 has 256 Kb of SRAM ,

SRAM                   (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
CCM_SRAM               (rwx) : ORIGIN = 0x10000000, LENGTH = 64K  /* Core Coupled SRAM. */

so can I replace the field of SRAM by 256-64K = 192K ?

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From I was able to read in the reference manual, this would be ok. I have changed it to 192k SRAM and 64k cc SRAM

I have noticed that in the "memory_with_bootloader.ld".

The origin of the BTLDR_SRAM was set to 0x2001E000, I have changed it to the below

SRAM             (rwx) : ORIGIN = 0x20000000, LENGTH = 184K

BTLDR_SRAM       (rwx) : ORIGIN = 0x2002E000, LENGTH = 8K       /* Boot loader stack at the end. */

CCM_SRAM         (rwx) : ORIGIN = 0x10000000, LENGTH = 64K      /* Core Coupled SRAM. */

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Anonymous
Not applicable

Sorry , i didnt get why 0x2001E000, is changed to 0x2002E000, ?

Can you please clarify ?

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The BTLDR_SRAM is the last 8K of the avaliable SRAM, so if the BTLDR_SRAM starts at 0x2001E000, this leaves 120K from the SRAM ORIGIN, so I assume this needs to be changed to have all the 184K (192-8), hence changing the BTLDR_SRAM to be at 0x2002E000 instead.

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Anonymous
Not applicable

That makes sense ,,,, Thank you very much René Josefsen

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Hi,

Memory layout is defined by the definitions located in the .ld files for different builds, where they are located in .../WICED/platform/MCU/STM32F4xx/GCC/STM32F429 directory.

The similar definitions could be found for other MCU platforms in their respective directories supported by the WICED SDK.

Seyhan

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I have been looking into the ld files, and have some question I hope you can clarify for me.

In the dct.ld file it says APP_FLASH as 976KB and SRAM 128KB,

In the memory_no_bootloader.ld is says APP_FLASH as 1024KB and SRAM as 128KB

In the memory_ram.ld it has SRAM as 128KB

In the last memory_with_bootloader.ld (I assume this is the most often layout to use) it has APP_FLASH as 0x1F4000 /* 2048K */ and SRAM as 128KB.

Can I just change the values for the APP_FLASH to 0x1F4000 /* 2048K */ in all the ld files? and also change the SRAM to 256K in all the files?

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