Wi-Fi Combo Forum Discussions
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Processor: CYW43907 (Murata 1GC module)
SDK: WICED 6.4
Issue 1:
Calling wwd_wifi_get_ap_info provides an AP mac address that does not match what the client is connect to.
The MAC provided is a valid MAC address of an AP but not what the Aruba Controller shows the client being connected to. It could be a cached MAC address from a previous connection before roaming but i don't have wireless captures to verify.
Issue 2:
Calling wwd_wifi_get_channel provides incorrect channel. The channel provides does not match the connected AP configuration. For example, if running channel 36 on the AP, the result of wwd_wifi_get_channel might be 39 or something close to the correct channel (not random or completely off).
Both of these commands read directly from the WLAN core via the ioctl commands so it is not a cached value within WICED layers.
Has anyone seen this?
Show LessHi,
We are using CYW43455 chipset driver on STM32MP processor. We did the following AP mode testing and got the packet loss.
1. Configured the CYW43455 as AP mode <Linux>
iw dev wlan0 interface add wlan1 type __ap
ifconfig wlan1 192.168.10.1 up
hostapd /etc/hostapd.conf -B
udhcpd /etc/udhcpd.conf
2. Trying to connect CYW43455 from another PC.
3. Connected successfully.
4. Did the ping on both the side and got the packet loss in ping response.
Need your support on this.
Regards, Zaid
Show LessDoes Wiced support FIPS 140-2?
Hi,
I am working on Murata1LD board. When I use ota2_manuf_image in the build statement to create the ota2 manufacting image, it results in following error.
make.exe[1]: *** No rule to make target 'ota2_failsafe', needed by 'ota2_manuf_image'. Stop.
make.exe[1]: *** Waiting for unfinished jobs....
Makefile:351: recipe for target 'main_app' failed
make: *** [main_app] Error 2
Can you please help me to resolve it.
Thank you,
Binsy M S
Show LessHi
We are using CYW43455 chipset driver on STM32MP processor. I am able to test Wifi Station and Wifi Access Point separately on the board (Linux OS) and it is working fine.
When I configure Wifi Station and Wifi Access Point concurrently, Wifi station is not working (AP is working fine). Do I need to look into any platform related changes in the SDIO controller driver? Please provide your suggestion
- Zaid
Show LessHi,
I've found some documentation about OTA2 implementation on the client side ('OTA2 update support' in \doc of the SDK and some forum posts) but I still don't fully get the big picture.
Follow are some questions:
- Does the modified image file resides on a predefined web server? Is it accessed over http/s?
- Is there any MQTT implementation of OTA2?
- Is there any 'negotiation' between the client and the server to verify image eligibility for download before actually downloading it (i.e. image versioning info)?
Is this negotiation done independently at app level (rather than using OTA2 engine)? - IS there any documentation describing the overall process, including server side considerations, out there?
Thanks for any advice
Show LessHi everyone,
i need to pass the RED (Radio Equipment Directive) certification for a custom board with the IC CYW4343W.
I found this page CYW4343W/CYW43438 Product Guide with some info about the board, with this article WICED Wi-Fi Direct Test mode: Introduction about the DTM.
When i load the sketch, if i type:
wl4343WA1.exe --serial 16 ver
the serial returns a string:
7.45 RC41.0
wl0: Jan 10 2017 19:57:03 version 7.45.98.6 (r663489) FWID 01-cf6f763a
without the "WLTEST". The article says that the "WLTEST" must appear.
I'm using the Wiced Studio 4.1, 6.2 and 6.4.
Show LessHi,
Can CY8C624ABZI-D44 + CYW4343W work?
Which development environment do I need to use? (WICED STUDIO or MODUSTOOLBOX)
Can you provide reference hardware and software design?
Show LessI'm using CYW94343WWCD1_EVB with WICED Studio 6.4.
I'd like to develop WiFi sniffer software using this CYW94343WWCD1_EVB without PC and WireShark.
Is it possible?
If possible, please tell how to develop it.
I hope this can be achieved by modifying some of the existing examples in WICED Studio 6.4.
Show LessHello,
In order to reduce the PCB size and overall cost of one of our products based on a Murata 1GC module, we have manufactured new boards with a new power supply system on which we are experiencing debug/flash issues.
Indeed, we are unable to program the flash memory, we tried with Olimex USB Tiny-H and Jlink (SWD and JTAG).
There is activity on the SPI flash bus, so the MCU seems boot up and runs the ROM bootloader.
We double checked every bootstrap pins and every power lines, everything is fine, the only thing is that the Cortex R4 cannot enter in debug state, while the JTAG chain is found by the debugger.
On our previous release (with another power supply stage) everything works fine, what could explain this kind of behaviour ?
EDIT: I forgot to mention that the boards have been checked under X-ray to detect manufacturing defects.
Thank you.
Log messages from J-Link commander when we try to connect:
JTAG:
J-Link>connect
Device "CYW43907" selected.
Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
Scanning AP map to find all available APs
AP[2]: Stopped AP scan as end of AP map has been reached
AP[0]: APB-AP (IDR: 0x44770002)
AP[1]: JTAG-AP (IDR: 0x24760010)
Iterating through AP map to find APB-AP to use
AP[0]: APB-AP found
ROMTbl[0][0]: CompAddr: 80001000 CID: B105900D, PID:04-008BBC14 Cortex-R4
Found Cortex-R4 r1p4
4 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.0
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
****** Error: Timeout while entering debug state
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
Cannot connect to target.
J-Link>
SWD:
J-Link>connect
Device "CYW43907" selected.
Connecting to target via SWD
Found SW-DP with ID 0x5BA02477
CoreSight AP[0]: 0x44770002, APB-AP
ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-008BBC14 Cortex-R4
Found Cortex-R4 r1p4
4 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.0
Found SW-DP with ID 0x5BA02477
****** Error: Timeout while entering debug state
Cortex-A/R (connect): Communication error when trying to read IDR of AP[0].
Found SW-DP with ID 0x5BA02477
Found SW-DP with ID 0x5BA02477
****** Error: Cortex-A/R (connect): Communication error when trying to read IDR of AP[0].
when trying to read IDR of AP[0].
Cannot connect to target.
J-Link>
On our previous (working) board:
Show Less
J-Link>connect
Device "CYW43907" selected.
Connecting to target via SWD
Found SW-DP with ID 0x5BA02477
CoreSight AP[0]: 0x44770002, APB-AP
ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-008BBC14 Cortex-R4
Found Cortex-R4 r1p4
4 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.0
Data endian: little
Main ID register: 0x411FC144
I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
TCM Type register: 0x00010001
MPU Type register: 0x00000800
System control register:
Instruction endian: little
Level-1 instruction cache enabled
Level-1 data cache enabled
MPU enabled
Branch prediction enabled
Memory zones:
[0]: Default (Default access mode)
[1]: APB-AP (AP0) (DMA like acc. in AP0 addr. space)
Cortex-R4 identified.
J-Link>