Hi,

We have a plan to use CYW43907.

Can this IC with latest WICED studio support IGMP ver3?

Thank you.

--TAK

Hi,

Currently, we have a plan to use the module based on STM32F412+CYW43438.

Can this combination with WICED support operate BLE central and BLE peripheral at the same time that is called "multi role"?

The customer would like to configure BLE central(connect to peripheral) and BLE peripheral (connect to central) at the same time by WICED app.

Thank you.

--TAK

I am using Cypress CYW54907 eval board. I was looking for WLAN test mode CW output with different channel and tx power setting. I managed to use wl43909B0.exe with bat file to achieve this.

But I am going to use another processor as host which communicate with CYW54907 eval board using serial communication to enable test mode output. So, I won't able to trigger the wl43909B0.exe from another processor.

can anyone let me know, if I want to send simple serial command to CYW54907 eval board from computer, without using wl43909B0.exe. How can I do this?

I need to know the command structure as well as exact commands which are need to be send by serial port to CYW54907 eval board.

Thank you.

with regards.

hi  i hace STM32F407 + CYW43455 besed board with is successfully working with wiced.

but now i have some older code based on USB peripheral for STM32407.. which is developed in keil ide..

now.. i need to port that code from keil to wiced..
have you any better solution?

thanks
jignesh narola

Hello,

Has anyone conducted any tests regarding the throughput of BCM43903 SOC?

Thank you all!

Hello.

With this article https://community.cypress.com/community/wiced-wifi/wiced-wifi-forums/blog/2018/03/19/downloading-and-debugging-cyw43907-using-jlink-segger  I can to program CYW943907AEVAL1F Board with J-Link. I try do this with my custom board and same Flash Memory, but with failed result.

However, with J-Flash utility I can erase, read and write to flash memory. Does entire hex file exist in Wiced Studio? So I can write it with J-Flash utility.

Log info from openocd_log.txt

Open On-Chip Debugger 0.10.0+dev-00227-g0d15c62 (2018-03-27-15:19)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.org/doc/doxygen/bugs.html

trst_and_srst separate srst_nogate trst_push_pull srst_push_pull connect_assert_srst

adapter speed: 100 kHz

adapter_nsrst_delay: 100

Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.

jtag_ntrst_delay: 100

post_init_psoc6_setup

Warn : Failed to open device: LIBUSB_ERROR_NOT_SUPPORTED.

Info : J-Link V9 compiled Oct 25 2018 11:46:07

Info : Hardware version: 9.40

Info : VTarget = 3.288 V

Info : clock speed 100 kHz

Info : JTAG tap: BCM43909.cpu tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x5)

Info : BCM43909.cpu: hardware has 4 breakpoints, 4 watchpoints

force hard breakpoints

Info : JTAG tap: BCM43909.cpu tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x5)

target halted in Thumb state due to debug-request, current mode: Supervisor

cpsr: 0x000001f3 pc: 0x00000000

D-Cache: disabled, I-Cache: disabled

cortex_a interrupt mask on

adapter speed: 10000 kHz

cpsr (/32): 0x000000D3

lr (/32): 0x00000000

32796 bytes written at address 0x004a0000

43264 bytes written at address 0x004a8040

32 bytes written at address 0x004b2940

2876 bytes written at address 0x004b2960

downloaded 78968 bytes in 1.459851s (52.825 KiB/s)

entry_address= 4882496

stack_address= 4939032

buffer_size= 32768

pc (/32): 0x004A8040

Total write size is 8000.

writing 8000 bytes at 32768

target halted in Thumb state due to debug-request, current mode: Supervisor

cpsr: 0x200000f3 pc: 0x004a8fee

D-Cache: enabled, I-Cache: enabled

loadimage address 4849692 foffset 0 8000

8000 bytes written at address 0x004a001c

downloaded 8000 bytes in 0.148978s (52.441 KiB/s)

target halted in Thumb state due to debug-request, current mode: Supervisor

cpsr: 0x200000f3 pc: 0x004a9032

D-Cache: enabled, I-Cache: enabled

target halted in Thumb state due to debug-request, current mode: Supervisor

cpsr: 0x200000f3 pc: 0x004a8fee

D-Cache: enabled, I-Cache: enabled

target halted in Thumb state due to debug-request, current mode: Supervisor

cpsr: 0x200000f3 pc: 0x004a8ff0

Hello All:

I recently tried to increase the default stack size of my main thread through the #define statement in wiced_defaults.h, but every value I tried seemed to have no effect. I don't know of a good method to check the stack size, but I needed to increase it to avoid a stack overflow, and how I know it had no effect was that I would see the same stack overflow reset with every value I tried - 2x the default, 4x, 8x, 10x, and 20x. This doesnt seem to be an issue when the stack is created via wiced_rtos_create_thread, where I found that setting a stack size of 2x the default successfully avoided the stack overflow problem

Any suggestions about why the wiced_default.h method doesn't work, or how to do it differently?