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NiMc_1688136
Level 5
Level 5
10 sign-ins 50 questions asked 10 solutions authored

I have a strange issue. We just built 30 custom boards and so far out of 14 or so tested i have seen 3 of them trip on the memp_overflow_check_detected assert after bootup, shortly after or during association and/or DHCP.  I cannot trap the exact point of error.

I have seen pool NETBUF and TCP_SEG MBUF as the pools in error and seems to change between multiple JTAG programming.

The crazy thing is that the error does not happen while the JTAG device is connected.

The VBAT and VDDIO supply lins are good/solid.

Could this be an RF issue due to an assembly error? This will be difficult to track down on the Murata 1GC module with the CYW43907 unless we find an xray service.

Any ideas on how to debug this in order to track down the root cause?

The firmware works on the other boards. I even downgraded the firmware to the previous known good release for these 3 and they still had errors.

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6 Replies
Zhengbao_Zhang
Moderator
Moderator
Moderator
First comment on KBA 10 questions asked 5 questions asked

Hello NickMckendree_1688136

    Do you have chance to do an exchange between the good one and the bad one ?

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Interestingly, after changing the module on our board the issue went away.

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Hello:

It has very small ratio module will have hardware problem ,   So better to check the PCB placement and  layout firstly , then if the issue is followed with module (bad one is still bad in another good board) , raise help to module maker, thanks.

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Sure,

the layout of the radio module has been used in over 2000 boards. This is a new batch of locally assembled boards which is why i am a little suprised of the issue and how it represented itself (LWIP memory pool full assert).

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And this is interesting , "The crazy thing is that the error does not happen while the JTAG device is connected."

Do you mean after connecting the JTAG device the board can run well without going to debug mode ?

another suggestion :  need to check the reset circuit ,  we have a reset delay circuit in the board reference .

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Good suggestion but we use the same circuit as the eval board and the parts are populated.

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