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Wi-Fi Combo

sofu_4755251
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First like given
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Dear all,

I am trying to port the WHD to STM32F769NI-Discovery board. I have been following the guide from Wi-Fi Host Driver (WHD): Main Page . Sofar, I have implemented CY RTOS API, Buffer Interface API, and Network Interface API. But now I have many difficulties and questions about porting the CY HAL SDIO Bus API.

This is the cyhal_sdio_irq_enable() inside cyhal_sdhc.c. SDMMC2 is the SDIO interface from the STM discovery board.

void cyhal_sdio_irq_enable(cyhal_sdio_t *obj, cyhal_sdio_irq_event_t event, bool enable)

{

obj->base = SDMMC2;

uint32_t interruptEnable = Cy_SD_Host_GetNormalInterruptEnable(obj->base);

uint32_t interruptMask = Cy_SD_Host_GetNormalInterruptMask(obj->base);

if (enable)

{

interruptEnable |= event;

interruptMask   |= event;

obj->irq_cause |= event;

}

else

{

interruptEnable &= ~(event);

interruptMask &= ~(event);

obj->irq_cause &= ~event;

}

Cy_SD_Host_SetNormalInterruptMask(obj->base, interruptMask);

Cy_SD_Host_SetNormalInterruptEnable(obj->base, interruptEnable);

}

SDMMC2 is defined in the stm32f769xx.h as following:

#define SDMMC2              ((SDMMC_TypeDef *) SDMMC2_BASE)

in the cyhal_hw_types.h, i have defined like this

typedef struct

{

#if defined(STM32F769xx)

SDMMC_TypeDef *base;

#else

    void *empty;

#endif /* defined(STM32F769xx) */

} cyhal_sdio_t;

My 1st question is: Is the way I implement the obj->base (pointing to SDMMC2) correct?

My 2nd question is how to map the events defined in cyhal_sdio.h to the events in STM32F7?  I will both the events in the WHD and in STMF7 below.

This is the definition cyhal_sdio_irq_event_t

typedef enum

{

    CYHAL_SDIO_CMD_COMPLETE   = 0x0001, //!> Command Complete

    CYHAL_SDIO_XFER_COMPLETE  = 0x0002, //!> Host read/write transfer is complete

    CYHAL_SDIO_BGAP_EVENT     = 0x0004, //!> This bit is set when both read/write transaction is stopped

    CYHAL_SDIO_DMA_INTERRUPT  = 0x0008, //!> Host controller detects an SDMA Buffer Boundary during transfer

    CYHAL_SDIO_BUF_WR_READY   = 0x0010, //!> This bit is set if the Buffer Write Enable changes from 0 to 1

    CYHAL_SDIO_BUF_RD_READY   = 0x0020, //!> This bit is set if the Buffer Read Enable changes from 0 to 1

    CYHAL_SDIO_CARD_INSERTION = 0x0040, //!> This bit is set if the Card Inserted in the Present State

    CYHAL_SDIO_CARD_REMOVAL   = 0x0080, //!> This bit is set if the Card Inserted in the Present State

    CYHAL_SDIO_CARD_INTERRUPT = 0x0100, //!> The synchronized value of the DAT[1] interrupt input for SD mode

    CYHAL_SDIO_INT_A          = 0x0200, //!> Reserved: set to 0

    CYHAL_SDIO_INT_B          = 0x0400, //!> Reserved: set to 0

    CYHAL_SDIO_INT_C          = 0x0800, //!> Reserved: set to 0,

    CYHAL_SDIO_RE_TUNE_EVENT  = 0x1000, //!> Reserved: set to 0,

    CYHAL_SDIO_FX_EVENT       = 0x2000, //!> This status is set when R[14] of response register is set to 1

    CYHAL_SDIO_CQE_EVENT      = 0x4000, //!> This status is set if Command Queuing/Crypto event has occurred

    CYHAL_SDIO_ERR_INTERRUPT  = 0x8000, //!> If any of the bits in the Error Interrupt Status register are set

    CYHAL_SDIO_ALL_INTERRUPTS = 0xE1FF, //!> Is used to enable/disable all interrupts

} cyhal_sdio_irq_event_t;

This is SDMMC_MASK in stm32

/**

  * @brief  Enable the SDMMC device interrupt.

  * @param  __INSTANCE__ : Pointer to SDMMC register base 

  * @param  __INTERRUPT__ : specifies the SDMMC interrupt sources to be enabled.

  *         This parameter can be one or a combination of the following values:

  *            @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt

  *            @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt

  *            @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt

  *            @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt

  *            @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt

  *            @arg SDMMC_IT_RXOVERR:  Received FIFO overrun error interrupt

  *            @arg SDMMC_IT_CMDREND:  Command response received (CRC check passed) interrupt

  *            @arg SDMMC_IT_CMDSENT:  Command sent (no response required) interrupt

  *            @arg SDMMC_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt

  *            @arg SDMMC_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt

  *            @arg SDMMC_IT_CMDACT:   Command transfer in progress interrupt

  *            @arg SDMMC_IT_TXACT:    Data transmit in progress interrupt

  *            @arg SDMMC_IT_RXACT:    Data receive in progress interrupt

  *            @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt

  *            @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt

  *            @arg SDMMC_IT_TXFIFOF:  Transmit FIFO full interrupt

  *            @arg SDMMC_IT_RXFIFOF:  Receive FIFO full interrupt

  *            @arg SDMMC_IT_TXFIFOE:  Transmit FIFO empty interrupt

  *            @arg SDMMC_IT_RXFIFOE:  Receive FIFO empty interrupt

  *            @arg SDMMC_IT_TXDAVL:   Data available in transmit FIFO interrupt

  *            @arg SDMMC_IT_RXDAVL:   Data available in receive FIFO interrupt

  *            @arg SDMMC_IT_SDIOIT:   SDIO interrupt received interrupt

  * @retval None

  */

#define __SDMMC_ENABLE_IT(__INSTANCE__, __INTERRUPT__)  ((__INSTANCE__)->MASK |= (__INTERRUPT__))

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1 Solution
KotnaniK_71
Employee
50 likes received 25 likes received 10 likes received
Employee

Hi,

Can you please let me know the Wi-fi chip module and the network stack which you are using?

Currently, WHD has support only for CYW43012, CYW4343W and the modules derived from these two base parts.

Meanwhile, can you please refer to the blog post STM32F469 porting in WICED gives you idea about WWD implementation which is almost similar to WHD. I will check internally regarding your questions and get back to you with more information.

Thanks.

View solution in original post

2 Replies
KotnaniK_71
Employee
50 likes received 25 likes received 10 likes received
Employee

Hi,

Can you please let me know the Wi-fi chip module and the network stack which you are using?

Currently, WHD has support only for CYW43012, CYW4343W and the modules derived from these two base parts.

Meanwhile, can you please refer to the blog post STM32F469 porting in WICED gives you idea about WWD implementation which is almost similar to WHD. I will check internally regarding your questions and get back to you with more information.

Thanks.

sofu_4755251
Level 1
First like given
Level 1

Hi,

Thanks for the reply and the link to the blog post. I am using CYW4343W(muRata-1DX) for the WiFi module, LWIP for the network stack and freeRTOS for the OS.

The porting guide for WHD and its example implementation are very helpful for network API, Buffer API and RTOS API. But I find it difficult to follow the guide for implementing the SDIO API.

For example, I need to implement "cyhal_sdio_irq_enable(cyhal_sdio_t *obj, cyhal_sdio_irq_event_t event, bool enable)". But does CYHAL_SDIO_BUF_WR_READY map to SDMMC_IT_TXFIFOE in stm32?

Does CYHAL_SDIO_CMD_COMPLETE map to SDMMC_IT_CMDREND or SDMMC_IT_CMDSENT, or SDMMC_IT_CMDREND | SDMMC_IT_CMDSENT?

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