- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I am trying to get the maximum UART Baudrate on BCM943341WCD1 EVB.
STM32F417 spec says that with input APB2 clk=84MHz, max USART1/6 baudrate is 10.5Mbits/s.
I see that ABP2 clk on BCM943341WCD1 is 60MHz. So the maximum iI can get is 7.5Mbits/s
Is there a way to increase this max baudrate to 10.5Mbits/s? Can we increase APB2 clk ?
Thanks,
Julien
Solved! Go to Solution.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
The clock setup could be done using definitions in .../platforms/BCM943341WCD1/platform_config.h file.
The PLL_N_CONSTANT could be changed to 336 to set the system clock to be 168MHz. With released setup the PCLK1 would be 42MHz and the PCLK2 would be 84MHz. With this setup, the terminal UART baudrate needs to verified.
Following tool from ST may help to setup up the PLL for STM32F417 http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/u...
Seyhan
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
The clock setup could be done using definitions in .../platforms/BCM943341WCD1/platform_config.h file.
The PLL_N_CONSTANT could be changed to 336 to set the system clock to be 168MHz. With released setup the PCLK1 would be 42MHz and the PCLK2 would be 84MHz. With this setup, the terminal UART baudrate needs to verified.
Following tool from ST may help to setup up the PLL for STM32F417 http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/u...
Seyhan