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I need to use Segger J-Link with CYQ954907AEVAL1F, but I am quite concerned, because there looks to be a short-circuit between the JTAG header and the FT2232HQ.
The FT2232HQ seems to be configured using a EEPROM (AT93C46D). This means as soon as power is applied top the board, the FT2232HQ will activate the FTDI_JTAG_TCK, FTDI_JTAG_TDI, and FTDI_JTAG_TMS pins as outputs.
If I connect a Segger J-Link, then there will be a short-circuit between the Segger J-Link and the FT2232HQ on pins FTDI_JTAG_TCK, FTDI_JTAG_TDI, and FTDI_JTAG_TMS, as both the FT2232HQ and the J-Link will continously drive these pins as outputs.
This issue has been reported before, but was never properly understood or answered:
CYW943907AEVAL1F external JTAG signals driving against FTDI JTAG signals
The fact that the board is not simultaneously programmed by both J-Link and FT2232HQ is beside the point.
The pins will short-circuit whether there is any active programming going on or not.
Solved! Go to Solution.
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My bad. They are directly tied to 3.3V Connecting the RESET# (14) to GND seems like the only option left.
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Your understanding is correct in this regard. The recommendation is to use the external power jack (J8) to avoid the short circuit. Unfortunately, this is a shortcoming in this kit design and I have passed it along. But if you use the external JTAG debugger like J-Link, Olimex connector, would recommend you to switch to the power jack for providing supply to the kit.
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Looking at the schematics, I don't see how using the external power jack (J8) would avoid the short circuit in any way?
FT2232HQ seems to be active and initialized regardless of how the board is powered.
The only reasonable possibility I can see is to solder a wire from the RESET# input of FT2232HQ to GND.
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My bad. They are directly tied to 3.3V Connecting the RESET# (14) to GND seems like the only option left.