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After an OTA image download I see around 1% not recovering until a power cycle of 100's of devices.
I am rebooting my processor after OTA with the command wiced_framework_reboot which eventually calls platform_mcu_specific_reset(PLATFORM_RESET_TYPE_POWERCYCLE).
At the end of this function is a while(1); loop hoping that the clock control is correctly setup prior to the while loop. Has anyone had problems with this?
I do not know if this while loop is the cause of my problem as I can't trap it on a board with a debugger.
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The platform_mcu_specific_reset() forces immediate reset by writing a value of 1 in the required register:
/* Set watchdog to reset system on next tick */
PLATFORM_CHIPCOMMON->clock_control.watchdog_counter = 1;
Watchdog reset occurs when this watchdog counter decrements from 1 to 0.
The watchdog counter operates at the ILP clock frquency. Hence you will see the problem only if the ILP clock is not set.