CYW43012 Bluetooth PCM Interface

[Danny_Scott]

We are using the CYW43012 (LBEE591LV Module) for Bluetooth in slave PCM mode not i2S mode in order to replace a now obsolete module. Therefore the CLK, DATA_IN and SYNC are all inputs to the module / chipset.

What clock edge should the data, and sync signals be sampled on please as the PCM Interface Timing Diagrams were removed in the CYW43012 datasheet (document number 002-18925 Rev *J). Does anybody know why? Is this interface / protocol not supported / not working and do we have to use the i2S configuration instead?

[Owen_Zhang123 · Accepted solution]

Please refer to the following description in the datasheet (chapter 8.1):

Note that Cypress's SDK only supports the PCM interface in I2S mode. In this mode the frame synchronization signal i.e. PCM_SYNC is used as the Word Select or the LR clock.