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I've written a simple console application that excercises my slave fifo design. As a test I do a single packet bulkin from one endpoint in my FPGA and then burst bulkin 16 packets from another endpoint in the FPGA. I do this 8 times in a for loop. So I know that XferData() does synchronous IO and once called doens't return until the transfer is completed. My FPGA puts out a signal that indicates whenever it is transferring data between the FX3 and itself. I see consistant periods of activity that shows how long each endpoint is actively transferring data, about 2.5 us for EP2 and about 41 us for EP1 which I know to be correct. So here is the mystery that I'm unable to solve. Sometimes XferData() will take 160 us or so to return and sometimes it will take 500+ us to return. The length of time is NOT dependent on how much data is being transferred; it's usually the same regardless of the endpoint and either short or long for both. Sometimes, the first 5 XferData() pairs will be really long and the last 3 will be around 200 us. I'm getting widely varying data rates and have no clue as to what's causing it. Anyone have ideas?
Show LessHello!,
I'm starting a new layout of a design using the FX3 device. I've carefully read the Hardware Guidelines for the FX3 and still cannot understand a couple things:
1) There is a recommendation of a ~11mil trace width and a 8mil space for the superspeed microstrip lines. From the development kit's fab drawing, I see that there is a bit of a bizarre stackup which yields a 90 Ohm differential impedance (edge-coupled) on these lines with a 12mil trace and 8 mil space. This is all fine, but unfortunately it causes some fairly large 19mil 50-ohm single ended traces! I have a fairly tight design, so I need reasonable ~5-8mil 50 Ohm traces on the top and bottom layers for routing. Is there a reason why the stackup was chosen to give these large traces? Is there a loss factor that I am not considering? I have a stackup that will give the 90 Ohms edge-coupled differential impedance with a ~6/8/6mil microstrip.
2) B-Type routing: I've decided to use a more rugged full size b-type connector and it is been a fairly painful experience so far. Would it be very unwise to keep the routing (as the attachment shows) on the same side as the connector? I understand that a 'stub' is created from this, but I have no idea on how to gauge the effect. Would it be better to run all of these signals through a set of vias, as recommended (with the ground vias appropriately spaced)? In my mind, it seems that introducing the layer change would be worst than the stub created, but I would definitely like to hear someone's informed opinion.
I would definitely like to hear from the experts on this one, thank you!
Steve M.
Show LessHi!
I have the following question to You: why in the FX3 Dev-Kit ( http://www.cypress.com/?rID=58321) high-speed lane SSRX P/N is connected to the USB3.0 connector in the reverse order? I mean that SSRX_M (FX3) goes to USB3.0 Connector PIN10 - SSRX_P (No.10: USB 3.0 signal receiving line (+)) and SSRX_P(FX3) goes to USB3.0 Connector PIN 9 SSRX_N (No.9: USB 3.0 signal receiving line (−)).
Best regards,
Krzysztof
Show LessCan someone please share with me the maximum throughput they've been able to achieve using the CY7C67300? I would like to confirm that there is indeed a good solution waiting out there for me to find it. I call this "confirming that the pot of gold is indeed a the end of the rainbow," before I go searching (R&D).
Specifically, I'm using the CY7C67300 in a standalone mode, providing USB Host support to a PSoC5. I need to STREAM 32,000 bytes per second into a file I write to a USB Flash Drive. So far, communication timing issues limit me to 4452 Bps.
Thanks,
Helmut
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My main question is above, but here's some additional info. Perhaps you're interested in reading it and commenting.
First, prior experience writing to a FAT file system on SD card educated me about a couple things. The traditional fileio.c code reads a block before writing it, even if you're writing a whole block. This was very wasteful. In the past, I modified the fileio.c to have what today I'll call a streaming mode, where I bypassed the initial block read (per a global flag, argh!) when writing this stream. In addition, I found that when a cluster got full and a new cluster needed to be allocated, the code spent "forever" handling the file allocation table and such. I had to simply make sure I was faster than my needed average speed, and then had a buffer large enough to handle the pause that occurs during cluster allocation.
Second, current experience divides the PSoC5-SPI-CY7C67300 communication into three levels, based on support code from AN15484. High level "command" operations are self-timed by waiting on the GPIO25 interrupt. Mid level "transaction" operations are self-timed by waiting on the GPIO24 interrupt. Low level "byte" transfers must be both separated and followed as a group by arbitrary delays. This is "nasty" and not well behaved. This is why I can't get beyond 4452 Bps (B/sec). Meanwhile, my PC can write the same flash drive at about 6.7 MB/sec, so I know it's not the flash drive. Do you have any insight or advice on this?
Third, I've been doing all this from the AN15484 app note and using it's pre-compiled support code in the CY7C76300. I have not yet studied the CY7C76300 datasheet or looked for technical manuals on this chip. My custom board design was derived from the app note as well, so I didn't really need to consult the datasheet much at all. So, any advice on where to find such technical manuals? The chip product page doesn't lead to much of use for this purpose, other than the CY4640 reference design. Looking again at that right now, I see the installed Docs folder. I don't immediately find much "overview". I do read in the datasheet that SPI can use DMA and up to 2Mbps slave clock, both germane. I don't find anything else about SPI communications.
Thanks very much,
Helmut
Show LessDear,
I am zhangyj, I have developed a project, that using CY7C68013A in slaveFIFO mode. Now I want to download the firmware to EEPROM,
I have created the IIC file by hex2bix, and download it to EEPROM.
USB device can be detected, and enumerate two times, but the firmware can not work, if I use USB cable download the firmware to 68013 directly, it will work.
Anyone can help me, thanks!
Show LessI'm getting NOWHERE very FAST! My biggest problem is that there seems to be nothing out there consistent with AN15484 "USB Flash Drive Controller Using SPI", including this app note itself any more! On a MyCases ticket I was assured I wouldn't get hung up, but here I am, hung up.
While I have many details, I'll sum up here:
(A) The cyusbgen.sys driver for the CY7C67300 via port 2A seems NOT compatible with Windows 7.
(B) AN15484 says to modify code or just use MSC_EEPROM_scan_LCP_v2.bin that comes with the app note. Well, I can't find that bin directly, I can't find the app note that I downloaded on 8/3/12 (today is 10/25/12), I've installed CY4640 and the code is close, but makes a co-processor-boot bin, not an eeprom-boot bin, CY3663 won't install on Windows 7 but when installed on Vista Basic, it doesn't have the source code or bin either, contrary to what AN15484 says.
Please help! I'm sinking...
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Here's some detail from a MyCases ticket. I'm so anxious I can't simply wait for a response on the ticket. My deadline is too short. Please bear with me for posting this again here...
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😞 I got my custom board with CY7C67300 only a couple of hours ago and I'm already stuck. I know your not responsible for my short deadline, but I need to be FINISHED with this by Wednesday, only 6 calendar days from now. Please help me get past the following roadblocks. I'm also trying to think ahead a little, so next time I get stuck, while working on this over the weekend, I may already have the answer from you! Thanks very much.
1) Note I have a copy of AN15484 "USB Flash Drive Controller Using SPI" that I downloaded in the past, but now I can't find it on your website anymore. Google has a reference to a page at cypress.com, but when I visit it, the page isn't found. I was hoping to find MSC_EEPROM_scan_LCP_V2.bin on that page, per what it says on page 2 (top right column) of the app note.
2) I can't find MSC_EEPROM_scan_LCP_v2.bin. I thought using it would save me from having to change and recompile the source, which is likely to have its own roadblocks. Can you provide me the file or a link to it? I believe it's exactly what I need, because the subject of AN15484 is exactly what I want to do.
3) I have connected the CY7C67300 port 2A to my PC via USB cable and it enumerates as CYPRESS EZ-OTG. However, the driver isn't found. I've installed CY3663 and find cy_dev.inf (10/28/2004) and cyusbgen.sys (11/26/2002) at c:\Cypress\USB\OTG-Host\Drivers. From the device manager I try to update the driver and point to this folder, but I get an error, "Windows could not find driver software for your device". Note I'm running Windows 7 SP1.
4) I have run bash then QTUI2C with no parameters, to successfully get the program help output. Will QTUI2C with proper parameters be able to access the CY7C67300 as is without proper driver? Or do I need that driver setup correctly first? I assume I need the driver, plus please let me know if I'm mistaken.
I'm going to go ahead and post this case. Rather than simply waiting for a reply, of course, I'm going to start trying stuff. Please check for followup posts on this case, where I may have yet additional questions.
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Please note that QTUI2C and the .inf/.sys files I found came from installing CY4640, not CY3663. I have not CY3663 install, perhaps because I can't get a CD.
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7) HOWEVER, on the laptop with CY3663 installed, there is no msc_api folder under source, so I can't find the source to use in that install per AN15484. More importantly, MSC_EEPROM_scan_LCP_V2.bin isn't there either.
...fast getting nowhere... 😞
Hello,
I am using 32 bit slave fifo interface. I send from FPGA to FX3 64 Words (total 256 bytes) with a zero lenght package at the end.
With C# I read using XferData with len = 1024. The function returns with len set to 256 which I expect.
However if I read with C++ XferData with len = 1024, I get the error 997.
Why is it different between C# and C++?
Regards,
Show LessHi all,
Is it possible to use the AYUV 4:4:4 uncompressed format with the UVC protocol? Or is this really limited to the uncompressed formats that are supported like YUY2.
Thanks,
Michael
Show Less