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Hi,
my FPGA board output 720P/60fps RGB888 signals and is proved on lcd panel.
now I want to implement on fx3 board.
first step I modified the descriptors as following.
/* GUID, globally unique identifier used to identify streaming-encoding format: RGB888 */
0x7D, 0xEB, 0x36, 0xE4, /* MEDIASUBTYPE_RGB888 GUID: E436EB7D-524F-11CE-9F53-0020AF0BA770 */
0x4F, 0x52, 0xCE, 0x11,
0x9F, 0x53, 0x00, 0x20,
0xAF, 0x0B, 0xA7, 0x70,
0x18, /* Number of bits per pixel: 24 */
/* Class specific Uncompressed VS frame descriptor 2 - 720p@ 60fps*/
0x1E, /* Descriptor size */
CX3_CS_INTRFC_DESCR, /* Descriptor type*/
0x05, /* Subtype: Uncompressed frame interface*/
0x01, /* Frame Descriptor Index: 1 */
0x00, /* No Still image capture method supported */
0x00, 0x05, /* Width in pixel: 1280 */
0xD0, 0x02, /* Height in pixel: 720 */
0x00, 0x00, 0x1A, 0x4F, /* Min bit rate @60ps (bits/s): 720 x 1280 x 3 x 60 x 8 = 1327104000 */
0x00, 0x00, 0x1A, 0x4F, /* Max bit rate @60fps (bits/s). 720 x 1280 x 3 x 60 x 8 = 1327104000 */
0x00, 0x30, 0x2A, 0x00, /* Maximum video frame size in bytes(Deprecated): 1280 x 720 x 3 */
0x0A, 0x8B, 0x02, 0x00, /* Default frame interval (in 100ns units): 166666 */
0x01, /* Frame interval type : No of discrete intervals */
0x0A, 0x8B, 0x02, 0x00, /* Frame interval 3: Same as Default frame interval */
then I modified GPIF interface
1. set 24bit
2. set
LD_DATA_COUNT 4091
LD_ADDR_COUNT 4091
3. set FV/LV polarity
generated new cyfxgpif2config.h
what other code should I modify?
io_cfg.isDQ32Bit should be true or false?
do I need to change DMA?
thanks a lot!
Solved! Go to Solution.
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finally, I got it working by setting the following values
LD_DATA_COUNT 5455
LD_ADDR_COUNT 5455