USB superspeed peripherals Forum Discussions

 hi,everyone!

i have a question,i found that most of the img files generated by the elf2img is bigger than 128KB ,but i only a 24lc512 on my board,should i add another two 24lc512 on my board or another one 24lc1024,or i have misunderstand the i2c eeprom boot mode ,

best regards,

lint

Hello,

I want to change the GPIF Configuration during runtime.

I read in the manual, that i have to use

CyU3PGpifDisable(CyTrue)

to force a reload, before doing a new CyU3PGpifLoad().

But everytime i call CyU3PGpifDisable(CyTrue),

my firmware crashes.

What coulde be wrong?

Best regards

g.

Hi,

I am trying to understand if it is possible to configure an FPGA using GPIF II (32-bit slave selectMAP) which requires the GPIF be configured as Master mode. Then switch GPIF to slave FIFO mode. I am wondering if you have an example.

Based on my understanding, in my case I cannot have disjoint state machines because one is master and one is slave. So, if I define two separate GPIF II projects, how I should configure the chip after completing the FPGA configuration? At the moment when I load a firmware to cypress, I cannot load any other firmware until a power down then up happens.

Also, I need to have an enable/disable signal along with the data path to implement a non-continuous FPGA configuration. If I choose any available GPIO, will it be synchronze with the data (for instance, it will be working with PCLK = 80MHz rate)?

Thanks,

Nazila

Hi,

From the application mode of "Programming EZ-USB® FX3™ Processor Port as Synchronous Slave FIFO", 32 Bit data bus width is not supported if SPI is selected. After bootup, I use SPI (GPIO[53] - SPI_SCK and GPIO[56] - SPI_MOSI) to configure FPGA, then I enable GPFI to 32-bit slave FIFO mode, it is obviously doable. During firmware runtime, I want to re-configure FPGA with SPI interface again, but at that monent, GPIF is 32-bit slave FIFO mode, Can I stop GPIF or switch to 16-bit mode, using SPI re-configure FPGA, and swtich to 32-bit slave FIFO again?

Thank you!

Hello,

I will use GPIF II as a master. A special function signal "OE" controls whether the data bus is driven or tristated by the FX3. But there isn't a pin to use as an output enable (to enable master's outputs) at slave side.

How can the data bus driven controlled internally by GPIF II state machine?

Regards,
Ali

Hi ,

has someone tryed to get a example running on rowleys crossworks for arm ?

i like it, i tryed to make the memory_map.xml

regards

kai

Is it possible to send windows file from PC to FX3 DVK REV3 board on usb3.0 ??

as per  cyusb. pdf  

The CYUSB3.SYS driver is licensed for distribution ONLY with Cypress USB products and

products that employ Cypress USB chips.

CYUSB3.SYS is a USB device driver for 32 bit Windows XP, 32/64 bit Windows Vista, 32/64 bit

Windows 7 and 32/64 bit Windows 8 Beta that is capable of communicating with any USB 2.0 and

USB3.0 compliant devices. The driver is general-purpose, understanding primitive USB commands, but

not implementing higher-level, USB device-class specific commands. For this reason, the driver is not

capable, for instance, of interfacing a USB mass storage class device to the Windows file system.

Please note that this release doesn't include the USB3.0 bulk streaming interface.

 and one more thing is it possible to do the same in case of FX3 board configured as a usb2.0?? because winxp must have installed HID & MASS storage classes driver

when the  CYUSB3014 is used  as HS-OTG host, how can I set  up the FX3 device? There is nothing about  CYUSB3014 is used  as HS-OTG host in FX3APIGuide.pdf.I want to understand  how HS-OTG host work on CYUSB3014?Thank you!

the fx3 SDK did not have  vend_request sample,so,I just want to write one,

but,when I download,fx3 can not be detected,,,,

who just give me some advices?thank you..