USB superspeed peripherals Forum Discussions
I am successfully using the sample slave fifo interface with an FPGA and want to reduce the number of pins. Is it possible to control OE (output enable) based on the 2bit address rather than on a dedicated pin?
Show LessDue to the mistake on the Sensor module layout, i will have to reconfigure data bus from GPIO[6], bus it seems the tool won't allow me to do so? it there any other solution?
Thanks
Owen
Show LessHi,
Does FX3 CYUSB3014 GPIO s support LVDS interface. Can we directly connect the LVDS outputs to GPIO pins?
We are exploring to interface an ADC LVDS outputs to the FX3 GPIO pins for data transfer. Kindly let us know
Thanking you
Sabiha
Show LessHi
I'm now working on a FX3 firmware to implement continuous data transfer.My FX3 device was interfaced to a FPGA in GPIF slave mode .The data was transfered from the FPGA to FX3 device then to my computer.
In my firmware,I created one thread and one DMA channel.The DMA channel was an AUTO_MANY_TO_ONE channel between the producer (two GPIF sockets) and consumer(a USB endpoint).The firmware is attached below
In my application,I use the APIs in cyapi.lib to implement data read They are :BeginDataXfer() ,WaitForXfer(), FinishDataXfer()
When I test the whole project ,there is always data loss. I don't know why
Show LessCould i change amplitude of SS_Tx+/- in firmware or other ways?
I am trying to modify the slave fifo example to output the clock on gpio[16] instead of receiving the clock. I changed the direction in the GPIF II Designer, and when I diff the header file output, I get:
85c85 < 0x800003B0, /* CY_U3P_PIB_GPIF_CONFIG */ --- > 0x80000380, /* CY_U3P_PIB_GPIF_CONFIG */
When I probe the pin, however, there is no clock running. I am guessing I need to set some other registers up to pipe the clock out?
How do I output the gpif clock on gpio[16]?
Show LessAll,
FX3 SDK v1.2.3. is uploaded on the following webpage.
http://www.cypress.com/?rID=57990
FX3 API help has been integrated into the Eclipse development environment.
I know that a few customers are looking for a bug fix related to CyU3PSysEnterSuspendMode API and consistent enumeration of FX3 device connected to USB 3.0.
This SDK has fixes for both of these.
Please refer to release notes available on the same page to know more on what all changes done compared to 1.2.2.
Regards,
Sai Krishna.
Show LessHi,
I am working on CYUSB3KIT-001 EZUSB FX3 Development Kit and I have installed all the required softwares in my PC.
Now , when I try to Transfer data to the Development Board using the Bulk out endpoint(0x02) , I get the error " BULK OUT transfer
BULK OUT transfer failed with Error Code:997".
Before trying this transmission , I downloaded the firmware CyBootProgrammer.img on the Development Kit. The configuation used were:
PMOD Config=> J96 - 2<-->3 short, J97 - open , J98 - 2<-->3 short
SW25 : 1- OFF, 2- OFF, 3- ON, 4- OFF.
I think these configurationsa are correct because the board got Programmed Successfully. I got the status message " Programming SPIFLASH Succeeded".
After that, I reset the firmware and tried to Transfer data, I am getting this error 997.
If someone has encountered this problem or know how to resolve it, please help me. I am stuck here.
I am attaching the image of USB control center error for better explanation of the problem.
Thanks in advance.....
Show LessHello,
Is there a driver or libusb app that does the same thing as the Cypress Control Center when it comes to USB RAM booting a blank device? I'd like to RAM boot my factory image then use that to flash the device with the production firmware. This way I can verify that the flash is readable/writeable.
If there is no such app, how does the Control Center send data over to an unprorgammed device? I could look at the traffic using a bus analyzer but I figured I'd ask first.
Show LessWe are using the CYUSB3011 part (has 256KB instead of 512KB) and need the memory map of these 256 KBytes. A linker file for this part would help solve this mystery as well.
I know there is RAM at 0x40078000 which is where the Boot firmware gets located. Since this is at 490Kish above the start of the System RAM, I'm wondering what the exact memory map looks like between 0x4000000 and 0x40080000 for this part number.
It's not in any data sheet, app note or code example that I can find.
Show Less